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authorGerd Hoffmann <kraxel@redhat.com>2020-12-03 11:54:16 +0100
committerGerd Hoffmann <kraxel@redhat.com>2020-12-10 08:47:44 +0100
commit3d09c00704adc1db4769cfa6291d96842f9674f1 (patch)
tree743ce9b8a8ea9aec1a16047630394250b4c5798d
parentc214a7bcb6320c37777a662f38aea2a7c6919148 (diff)
microvm: make pcie irq base runtime changeable
Allows to move them in case we have enough irq lines available. Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Sergio Lopez <slp@redhat.com> Message-id: 20201203105423.10431-6-kraxel@redhat.com
-rw-r--r--hw/i386/microvm.c11
-rw-r--r--include/hw/i386/microvm.h2
2 files changed, 7 insertions, 6 deletions
diff --git a/hw/i386/microvm.c b/hw/i386/microvm.c
index e92f236bf4..5e4182b474 100644
--- a/hw/i386/microvm.c
+++ b/hw/i386/microvm.c
@@ -181,6 +181,7 @@ static void microvm_devices_init(MicrovmMachineState *mms)
mms->virtio_irq_base = 5;
mms->virtio_num_transports = 8;
if (x86_machine_is_acpi_enabled(x86ms)) {
+ mms->pcie_irq_base = 12;
mms->virtio_irq_base = 16;
}
@@ -226,12 +227,12 @@ static void microvm_devices_init(MicrovmMachineState *mms)
mms->gpex.mmio32.size = PCIE_MMIO_SIZE;
mms->gpex.ecam.base = PCIE_ECAM_BASE;
mms->gpex.ecam.size = PCIE_ECAM_SIZE;
- mms->gpex.irq = PCIE_IRQ_BASE;
+ mms->gpex.irq = mms->pcie_irq_base;
create_gpex(mms);
- x86ms->pci_irq_mask = ((1 << (PCIE_IRQ_BASE + 0)) |
- (1 << (PCIE_IRQ_BASE + 1)) |
- (1 << (PCIE_IRQ_BASE + 2)) |
- (1 << (PCIE_IRQ_BASE + 3)));
+ x86ms->pci_irq_mask = ((1 << (mms->pcie_irq_base + 0)) |
+ (1 << (mms->pcie_irq_base + 1)) |
+ (1 << (mms->pcie_irq_base + 2)) |
+ (1 << (mms->pcie_irq_base + 3)));
} else {
x86ms->pci_irq_mask = 0;
}
diff --git a/include/hw/i386/microvm.h b/include/hw/i386/microvm.h
index c5d60bacb5..f1e9db059b 100644
--- a/include/hw/i386/microvm.h
+++ b/include/hw/i386/microvm.h
@@ -66,7 +66,6 @@
#define PCIE_MMIO_SIZE 0x20000000
#define PCIE_ECAM_BASE 0xe0000000
#define PCIE_ECAM_SIZE 0x10000000
-#define PCIE_IRQ_BASE 12
/* Machine type options */
#define MICROVM_MACHINE_PIT "pit"
@@ -96,6 +95,7 @@ struct MicrovmMachineState {
bool auto_kernel_cmdline;
/* Machine state */
+ uint32_t pcie_irq_base;
uint32_t virtio_irq_base;
uint32_t virtio_num_transports;
bool kernel_cmdline_fixed;