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authorEric Auger <eric.auger@redhat.com>2018-09-25 14:02:32 +0100
committerPeter Maydell <peter.maydell@linaro.org>2018-09-25 15:13:24 +0100
commit9f4d2a1316fc294da5c0646fa93894d5f5f0c9a0 (patch)
treebda1ea86fbc6ddb5a029b17654aec95278040610
parent6ce9297be69be10465b556a4b3380f70634c16a7 (diff)
hw/arm/smmuv3: fix eventq recording and IRQ triggerring
The event queue management is broken today. Event records are not properly written as EVT_SET_* macro was not updating the actual event record. Also the event queue interrupt is not correctly triggered. Fixes: bb981004eaf4 ("hw/arm/smmuv3: Event queue recording helper") Signed-off-by: Eric Auger <eric.auger@redhat.com> Message-id: 20180921070138.10114-3-eric.auger@redhat.com Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/arm/smmuv3-internal.h26
-rw-r--r--hw/arm/smmuv3.c2
2 files changed, 14 insertions, 14 deletions
diff --git a/hw/arm/smmuv3-internal.h b/hw/arm/smmuv3-internal.h
index bab25d640e..19540f8f41 100644
--- a/hw/arm/smmuv3-internal.h
+++ b/hw/arm/smmuv3-internal.h
@@ -442,17 +442,17 @@ typedef struct SMMUEventInfo {
#define EVT_Q_OVERFLOW (1 << 31)
-#define EVT_SET_TYPE(x, v) deposit32((x)->word[0], 0 , 8 , v)
-#define EVT_SET_SSV(x, v) deposit32((x)->word[0], 11, 1 , v)
-#define EVT_SET_SSID(x, v) deposit32((x)->word[0], 12, 20, v)
-#define EVT_SET_SID(x, v) ((x)->word[1] = v)
-#define EVT_SET_STAG(x, v) deposit32((x)->word[2], 0 , 16, v)
-#define EVT_SET_STALL(x, v) deposit32((x)->word[2], 31, 1 , v)
-#define EVT_SET_PNU(x, v) deposit32((x)->word[3], 1 , 1 , v)
-#define EVT_SET_IND(x, v) deposit32((x)->word[3], 2 , 1 , v)
-#define EVT_SET_RNW(x, v) deposit32((x)->word[3], 3 , 1 , v)
-#define EVT_SET_S2(x, v) deposit32((x)->word[3], 7 , 1 , v)
-#define EVT_SET_CLASS(x, v) deposit32((x)->word[3], 8 , 2 , v)
+#define EVT_SET_TYPE(x, v) ((x)->word[0] = deposit32((x)->word[0], 0 , 8 , v))
+#define EVT_SET_SSV(x, v) ((x)->word[0] = deposit32((x)->word[0], 11, 1 , v))
+#define EVT_SET_SSID(x, v) ((x)->word[0] = deposit32((x)->word[0], 12, 20, v))
+#define EVT_SET_SID(x, v) ((x)->word[1] = v)
+#define EVT_SET_STAG(x, v) ((x)->word[2] = deposit32((x)->word[2], 0 , 16, v))
+#define EVT_SET_STALL(x, v) ((x)->word[2] = deposit32((x)->word[2], 31, 1 , v))
+#define EVT_SET_PNU(x, v) ((x)->word[3] = deposit32((x)->word[3], 1 , 1 , v))
+#define EVT_SET_IND(x, v) ((x)->word[3] = deposit32((x)->word[3], 2 , 1 , v))
+#define EVT_SET_RNW(x, v) ((x)->word[3] = deposit32((x)->word[3], 3 , 1 , v))
+#define EVT_SET_S2(x, v) ((x)->word[3] = deposit32((x)->word[3], 7 , 1 , v))
+#define EVT_SET_CLASS(x, v) ((x)->word[3] = deposit32((x)->word[3], 8 , 2 , v))
#define EVT_SET_ADDR(x, addr) \
do { \
(x)->word[5] = (uint32_t)(addr >> 32); \
@@ -460,8 +460,8 @@ typedef struct SMMUEventInfo {
} while (0)
#define EVT_SET_ADDR2(x, addr) \
do { \
- deposit32((x)->word[7], 3, 29, addr >> 16); \
- deposit32((x)->word[7], 0, 16, addr & 0xffff);\
+ (x)->word[7] = deposit32((x)->word[7], 3, 29, addr >> 16); \
+ (x)->word[7] = deposit32((x)->word[7], 0, 16, addr & 0xffff);\
} while (0)
void smmuv3_record_event(SMMUv3State *s, SMMUEventInfo *event);
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index bb6a24e9b8..8c4e99fecc 100644
--- a/hw/arm/smmuv3.c
+++ b/hw/arm/smmuv3.c
@@ -136,7 +136,7 @@ static MemTxResult smmuv3_write_eventq(SMMUv3State *s, Evt *evt)
return r;
}
- if (smmuv3_q_empty(q)) {
+ if (!smmuv3_q_empty(q)) {
smmuv3_trigger_irq(s, SMMU_IRQ_EVTQ, 0);
}
return MEMTX_OK;