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authorAlexander Graf <agraf@suse.de>2011-07-23 11:27:53 +0200
committerAlexander Graf <agraf@suse.de>2011-10-06 09:43:33 +0200
commit0d33defbe3e75db75599c52607da6fc3b4ce0f25 (patch)
treec58359f233ecc0a688f5ce86dc08c376ca7585c4
parent3ee82442c53e342883eb6f05b1776b05892e336f (diff)
PPC: MPIC: Fix CI bit definitions
The bit definitions for critical interrupt routing are in PowerPC order (most significant bit is 0), while we end up shifting it with normal bit order. Turn the numbers around so we actually end up fetching the right ones. Signed-off-by: Alexander Graf <agraf@suse.de>
-rw-r--r--hw/openpic.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/hw/openpic.c b/hw/openpic.c
index dfec52e2e2..109c1bc6f4 100644
--- a/hw/openpic.c
+++ b/hw/openpic.c
@@ -131,11 +131,11 @@ enum {
#define MPIC_CPU_REG_SIZE 0x100 + ((MAX_CPU - 1) * 0x1000)
enum mpic_ide_bits {
- IDR_EP = 0,
- IDR_CI0 = 1,
- IDR_CI1 = 2,
- IDR_P1 = 30,
- IDR_P0 = 31,
+ IDR_EP = 31,
+ IDR_CI0 = 30,
+ IDR_CI1 = 29,
+ IDR_P1 = 1,
+ IDR_P0 = 0,
};
#else