diff options
author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2014-03-20 00:03:57 +1100 |
---|---|---|
committer | Andreas Färber <afaerber@suse.de> | 2014-03-20 02:39:33 +0100 |
commit | d197fdbc3b83655f3c145722805f0998c04dce16 (patch) | |
tree | 3307a2df24cdbaa05b2889bf01e49303990a1743 | |
parent | 7aaf4957efad2bf6ac449d0caa9a1535f61006bc (diff) |
target-ppc: Reset SPRs on CPU reset
This resets SPR values to defaults on CPU reset. This should help
with little-endian guests reboot issues.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Greg Kurz <gkurz@linux.vnet.ibm.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
-rw-r--r-- | target-ppc/cpu.h | 1 | ||||
-rw-r--r-- | target-ppc/translate_init.c | 12 |
2 files changed, 12 insertions, 1 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 91b7ae5534..8c181e7245 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -334,6 +334,7 @@ struct ppc_spr_t { void (*hea_write)(void *opaque, int spr_num, int gpr_num); #endif const char *name; + target_ulong default_value; #ifdef CONFIG_KVM /* We (ab)use the fact that all the SPRs will have ids for the * ONE_REG interface will have KVM_REG_PPC to use 0 as meaning, diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 6084f40f28..954dee3ec2 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -631,7 +631,7 @@ static inline void _spr_register(CPUPPCState *env, int num, #if defined(CONFIG_KVM) spr->one_reg_id = one_reg_id, #endif - env->spr[num] = initial_value; + env->spr[num] = spr->default_value = initial_value; } /* Generic PowerPC SPRs */ @@ -8381,6 +8381,7 @@ static void ppc_cpu_reset(CPUState *s) PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); CPUPPCState *env = &cpu->env; target_ulong msr; + int i; pcc->parent_reset(s); @@ -8434,6 +8435,15 @@ static void ppc_cpu_reset(CPUState *s) env->dtl_size = 0; #endif /* TARGET_PPC64 */ + for (i = 0; i < ARRAY_SIZE(env->spr_cb); i++) { + ppc_spr_t *spr = &env->spr_cb[i]; + + if (!spr->name) { + continue; + } + env->spr[i] = spr->default_value; + } + /* Flush all TLBs */ tlb_flush(s, 1); } |