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authorRichard Henderson <richard.henderson@linaro.org>2021-04-19 13:22:56 -0700
committerPeter Maydell <peter.maydell@linaro.org>2021-04-30 11:16:51 +0100
commit37abe399df6a8b7006a19f3378715b650599e8fa (patch)
tree60e0150938a94aebf0317dc78d7a45d13d6948c6
parentc8f638d99aaf8284b9ba81fb49ad6985d109794f (diff)
target/arm: Enforce alignment for aa64 vector LDn/STn (single)
Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210419202257.161730-31-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/translate-a64.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 2a82dbbd6d..95897e63af 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -3815,6 +3815,7 @@ static void disas_ldst_single_struct(DisasContext *s, uint32_t insn)
int index = is_q << 3 | S << 2 | size;
int xs, total;
TCGv_i64 clean_addr, tcg_rn, tcg_ebytes;
+ MemOp mop;
if (extract32(insn, 31, 1)) {
unallocated_encoding(s);
@@ -3876,6 +3877,7 @@ static void disas_ldst_single_struct(DisasContext *s, uint32_t insn)
clean_addr = gen_mte_checkN(s, tcg_rn, !is_load, is_postidx || rn != 31,
total);
+ mop = finalize_memop(s, scale);
tcg_ebytes = tcg_const_i64(1 << scale);
for (xs = 0; xs < selem; xs++) {
@@ -3883,8 +3885,7 @@ static void disas_ldst_single_struct(DisasContext *s, uint32_t insn)
/* Load and replicate to all elements */
TCGv_i64 tcg_tmp = tcg_temp_new_i64();
- tcg_gen_qemu_ld_i64(tcg_tmp, clean_addr,
- get_mem_index(s), s->be_data + scale);
+ tcg_gen_qemu_ld_i64(tcg_tmp, clean_addr, get_mem_index(s), mop);
tcg_gen_gvec_dup_i64(scale, vec_full_reg_offset(s, rt),
(is_q + 1) * 8, vec_full_reg_size(s),
tcg_tmp);
@@ -3892,9 +3893,9 @@ static void disas_ldst_single_struct(DisasContext *s, uint32_t insn)
} else {
/* Load/store one element per register */
if (is_load) {
- do_vec_ld(s, rt, index, clean_addr, scale | s->be_data);
+ do_vec_ld(s, rt, index, clean_addr, mop);
} else {
- do_vec_st(s, rt, index, clean_addr, scale | s->be_data);
+ do_vec_st(s, rt, index, clean_addr, mop);
}
}
tcg_gen_add_i64(clean_addr, clean_addr, tcg_ebytes);