diff options
author | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-06-25 16:27:18 +0200 |
---|---|---|
committer | Aleksandar Markovic <amarkovic@wavecomp.com> | 2019-06-26 13:25:07 +0200 |
commit | a9e2d149d638b69d456b48dcc41d15e80bce20ac (patch) | |
tree | 2ec242a6d774371225acb284fa7e239ae3874a27 | |
parent | d37eae6ccd115d43474416dfcb35fe81e22cf0dc (diff) |
dma/rc4030: Minor code style cleanup
Fix some simple checkpatch.pl warnings in rc4030.c.
Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
Reviewed-by: Aleksandar Rikalo <arikalo@wavecomp.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Message-Id: <1561472838-32272-3-git-send-email-aleksandar.markovic@rt-rk.com>
-rw-r--r-- | hw/dma/rc4030.c | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 88ff271ee1..155af9b26a 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -58,8 +58,8 @@ typedef struct dma_pagetable_entry { #define TYPE_RC4030_IOMMU_MEMORY_REGION "rc4030-iommu-memory-region" -typedef struct rc4030State -{ +typedef struct rc4030State { + SysBusDevice parent; uint32_t config; /* 0x0000: RC4030 config register */ @@ -152,8 +152,9 @@ static uint64_t rc4030_read(void *opaque, hwaddr addr, unsigned int size) case 0x0058: val = s->cache_bmask; /* HACK */ - if (s->cache_bmask == (uint32_t)-1) + if (s->cache_bmask == (uint32_t)-1) { s->cache_bmask = 0; + } break; /* Remote Speed Registers */ case 0x0070: @@ -538,8 +539,9 @@ static void rc4030_reset(DeviceState *dev) s->memory_refresh_rate = 0x18186; s->nvram_protect = 7; - for (i = 0; i < 15; i++) + for (i = 0; i < 15; i++) { s->rem_speed[i] = 7; + } s->imr_jazz = 0x10; /* XXX: required by firmware, but why? */ s->isr_jazz = 0; @@ -551,7 +553,7 @@ static void rc4030_reset(DeviceState *dev) static int rc4030_post_load(void *opaque, int version_id) { - rc4030State* s = opaque; + rc4030State *s = opaque; set_next_tick(s); update_jazz_irq(s); @@ -591,7 +593,8 @@ static void rc4030_do_dma(void *opaque, int n, uint8_t *buf, int len, int is_wri hwaddr dma_addr; int dev_to_mem; - s->dma_regs[n][DMA_REG_ENABLE] &= ~(DMA_FLAG_TC_INTR | DMA_FLAG_MEM_INTR | DMA_FLAG_ADDR_INTR); + s->dma_regs[n][DMA_REG_ENABLE] &= + ~(DMA_FLAG_TC_INTR | DMA_FLAG_MEM_INTR | DMA_FLAG_ADDR_INTR); /* Check DMA channel consistency */ dev_to_mem = (s->dma_regs[n][DMA_REG_ENABLE] & DMA_FLAG_MEM_TO_DEV) ? 0 : 1; @@ -603,8 +606,9 @@ static void rc4030_do_dma(void *opaque, int n, uint8_t *buf, int len, int is_wri } /* Get start address and len */ - if (len > s->dma_regs[n][DMA_REG_COUNT]) + if (len > s->dma_regs[n][DMA_REG_COUNT]) { len = s->dma_regs[n][DMA_REG_COUNT]; + } dma_addr = s->dma_regs[n][DMA_REG_ADDRESS]; /* Read/write data at right place */ |