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authorAlistair Francis <alistair.francis@wdc.com>2020-03-27 12:54:45 -0700
committerAlistair Francis <alistair.francis@wdc.com>2020-06-19 08:24:07 -0700
commit88914473e748db20d8e18b9735f647a683319fa6 (patch)
tree4e24b8f26ca94b488bff83b6a37dbbb0e2e6ac4b
parentefe9f9c820d1322729957a60ff785c9527a79ddf (diff)
target/riscv: Report errors validating 2nd-stage PTEs
Signed-off-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r--target/riscv/cpu_helper.c9
1 files changed, 7 insertions, 2 deletions
diff --git a/target/riscv/cpu_helper.c b/target/riscv/cpu_helper.c
index eda7057663..75d2ae3434 100644
--- a/target/riscv/cpu_helper.c
+++ b/target/riscv/cpu_helper.c
@@ -435,8 +435,13 @@ restart:
hwaddr vbase;
/* Do the second stage translation on the base PTE address. */
- get_physical_address(env, &vbase, &vbase_prot, base, MMU_DATA_LOAD,
- mmu_idx, false, true);
+ int vbase_ret = get_physical_address(env, &vbase, &vbase_prot,
+ base, MMU_DATA_LOAD,
+ mmu_idx, false, true);
+
+ if (vbase_ret != TRANSLATE_SUCCESS) {
+ return vbase_ret;
+ }
pte_addr = vbase + idx * ptesize;
} else {