diff options
author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2014-06-04 22:50:41 +1000 |
---|---|---|
committer | Alexander Graf <agraf@suse.de> | 2014-06-16 13:24:42 +0200 |
commit | 75b9c321f44c13ccf1ba13eafc756b1a5d8f5eb1 (patch) | |
tree | 1e68314d800fe812faa81cb3137bf6f9a494cc6a | |
parent | fd51ff6328e3d981582436d1040f648c8da4a41f (diff) |
target-ppc: Add "POWER" prefix to MMCRA PMU registers
Since we started adding "POWER" prefix to 64bit PMU SPRs, let's finish
the transition and fix MMCRA and define a supermode version of it.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
-rw-r--r-- | target-ppc/cpu.h | 3 | ||||
-rw-r--r-- | target-ppc/translate_init.c | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index fef8651626..531124c541 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1462,7 +1462,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_PERF2 (0x302) #define SPR_RCPU_MI_RBA2 (0x302) #define SPR_MPC_MI_AP (0x302) -#define SPR_MMCRA (0x302) +#define SPR_POWER_UMMCRA (0x302) #define SPR_PERF3 (0x303) #define SPR_RCPU_MI_RBA3 (0x303) #define SPR_MPC_MI_EPN (0x303) @@ -1505,6 +1505,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_UPERF0 (0x310) #define SPR_UPERF1 (0x311) #define SPR_UPERF2 (0x312) +#define SPR_POWER_MMCRA (0X312) #define SPR_UPERF3 (0x313) #define SPR_POWER_PMC1 (0X313) #define SPR_UPERF4 (0x314) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index def40742f3..11db6e77a1 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7712,7 +7712,7 @@ static void init_proc_POWER7 (CPUPPCState *env) SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, KVM_REG_PPC_DSCR, 0x00000000); - spr_register_kvm(env, SPR_MMCRA, "SPR_MMCRA", + spr_register_kvm(env, SPR_POWER_MMCRA, "SPR_MMCRA", SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, KVM_REG_PPC_MMCRA, 0x00000000); |