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authorPeter Maydell <peter.maydell@linaro.org>2016-07-07 14:49:38 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-07-07 14:49:38 +0100
commit4f4a9ca4a4386c137301b3662faba076455ff15a (patch)
treeff404c1d71d3c61e456d399a453b68785a184b2e
parent5563168c530e2cde8e000ee7aa4afc0ea4d0b42e (diff)
parent66542f639927bd1420db38a969d5fa8ad1c89ae1 (diff)
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160707' into staging
target-arm queue: * fix a wrong variable type for A64 SYS_HEAPINFO semihosting call * xlnx_dp: fix iffy xlnx_dp_aux_push_tx_fifo * aux: fix break that wanted to break two levels out * aux: Rename aux.[ch] to auxbus.[ch] for the benefit of Windows * hw/block/m25p80: fix resource leak * i.MX: split the GPT timer implementation into per SOC definitions # gpg: Signature made Thu 07 Jul 2016 14:48:09 BST # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20160707: i.MX: split the GPT timer implementation into per SOC definitions hw/block/m25p80: fix resource leak aux: Rename aux.[ch] to auxbus.[ch] for the benefit of Windows aux: fix break that wanted to break two levels out xlnx_dp: fix iffy xlnx_dp_aux_push_tx_fifo target-arm/arm-semi.c: In SYS_HEAPINFO use correct type for 'limit' Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/arm/fsl-imx25.c2
-rw-r--r--hw/arm/fsl-imx31.c2
-rw-r--r--hw/arm/fsl-imx6.c2
-rw-r--r--hw/block/m25p80.c6
-rw-r--r--hw/display/dpcd.c2
-rw-r--r--hw/display/xlnx_dp.c10
-rw-r--r--hw/misc/Makefile.objs2
-rw-r--r--hw/misc/auxbus.c (renamed from hw/misc/aux.c)16
-rw-r--r--hw/misc/imx6_ccm.c6
-rw-r--r--hw/timer/imx_gpt.c69
-rw-r--r--include/hw/display/xlnx_dp.h2
-rw-r--r--include/hw/misc/auxbus.h (renamed from include/hw/misc/aux.h)2
-rw-r--r--include/hw/misc/imx_ccm.h5
-rw-r--r--include/hw/timer/imx_gpt.h9
-rw-r--r--target-arm/arm-semi.c2
15 files changed, 107 insertions, 30 deletions
diff --git a/hw/arm/fsl-imx25.c b/hw/arm/fsl-imx25.c
index 1a53e51cf1..b4e358db65 100644
--- a/hw/arm/fsl-imx25.c
+++ b/hw/arm/fsl-imx25.c
@@ -51,7 +51,7 @@ static void fsl_imx25_init(Object *obj)
}
for (i = 0; i < FSL_IMX25_NUM_GPTS; i++) {
- object_initialize(&s->gpt[i], sizeof(s->gpt[i]), TYPE_IMX_GPT);
+ object_initialize(&s->gpt[i], sizeof(s->gpt[i]), TYPE_IMX25_GPT);
qdev_set_parent_bus(DEVICE(&s->gpt[i]), sysbus_get_default());
}
diff --git a/hw/arm/fsl-imx31.c b/hw/arm/fsl-imx31.c
index b283b71eb4..fe204ace62 100644
--- a/hw/arm/fsl-imx31.c
+++ b/hw/arm/fsl-imx31.c
@@ -47,7 +47,7 @@ static void fsl_imx31_init(Object *obj)
qdev_set_parent_bus(DEVICE(&s->uart[i]), sysbus_get_default());
}
- object_initialize(&s->gpt, sizeof(s->gpt), TYPE_IMX_GPT);
+ object_initialize(&s->gpt, sizeof(s->gpt), TYPE_IMX31_GPT);
qdev_set_parent_bus(DEVICE(&s->gpt), sysbus_get_default());
for (i = 0; i < FSL_IMX31_NUM_EPITS; i++) {
diff --git a/hw/arm/fsl-imx6.c b/hw/arm/fsl-imx6.c
index ed392a9e7f..6a1bf263a5 100644
--- a/hw/arm/fsl-imx6.c
+++ b/hw/arm/fsl-imx6.c
@@ -67,7 +67,7 @@ static void fsl_imx6_init(Object *obj)
object_property_add_child(obj, name, OBJECT(&s->uart[i]), NULL);
}
- object_initialize(&s->gpt, sizeof(s->gpt), TYPE_IMX_GPT);
+ object_initialize(&s->gpt, sizeof(s->gpt), TYPE_IMX6_GPT);
qdev_set_parent_bus(DEVICE(&s->gpt), sysbus_get_default());
object_property_add_child(obj, "gpt", OBJECT(&s->gpt), NULL);
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index d9b27939dd..ca8c12c0f8 100644
--- a/hw/block/m25p80.c
+++ b/hw/block/m25p80.c
@@ -459,12 +459,13 @@ static void blk_sync_complete(void *opaque, int ret)
static void flash_sync_page(Flash *s, int page)
{
- QEMUIOVector *iov = g_new(QEMUIOVector, 1);
+ QEMUIOVector *iov;
if (!s->blk || blk_is_read_only(s->blk)) {
return;
}
+ iov = g_new(QEMUIOVector, 1);
qemu_iovec_init(iov, 1);
qemu_iovec_add(iov, s->storage + page * s->pi->page_size,
s->pi->page_size);
@@ -474,13 +475,14 @@ static void flash_sync_page(Flash *s, int page)
static inline void flash_sync_area(Flash *s, int64_t off, int64_t len)
{
- QEMUIOVector *iov = g_new(QEMUIOVector, 1);
+ QEMUIOVector *iov;
if (!s->blk || blk_is_read_only(s->blk)) {
return;
}
assert(!(len % BDRV_SECTOR_SIZE));
+ iov = g_new(QEMUIOVector, 1);
qemu_iovec_init(iov, 1);
qemu_iovec_add(iov, s->storage + off, len);
blk_aio_pwritev(s->blk, off, iov, 0, blk_sync_complete, iov);
diff --git a/hw/display/dpcd.c b/hw/display/dpcd.c
index 5a36855240..ce92ff6e2a 100644
--- a/hw/display/dpcd.c
+++ b/hw/display/dpcd.c
@@ -28,7 +28,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
-#include "hw/misc/aux.h"
+#include "hw/misc/auxbus.h"
#include "hw/display/dpcd.h"
#ifndef DEBUG_DPCD
diff --git a/hw/display/xlnx_dp.c b/hw/display/xlnx_dp.c
index be53b756c3..f43eb09304 100644
--- a/hw/display/xlnx_dp.c
+++ b/hw/display/xlnx_dp.c
@@ -438,10 +438,10 @@ static void xlnx_dp_aux_clear_tx_fifo(XlnxDPState *s)
fifo8_reset(&s->tx_fifo);
}
-static void xlnx_dp_aux_push_tx_fifo(XlnxDPState *s, uint8_t val, size_t len)
+static void xlnx_dp_aux_push_tx_fifo(XlnxDPState *s, uint8_t *buf, size_t len)
{
DPRINTF("Push %u data in tx_fifo\n", (unsigned)len);
- fifo8_push_all(&s->tx_fifo, &val, len);
+ fifo8_push_all(&s->tx_fifo, buf, len);
}
static uint8_t xlnx_dp_aux_pop_tx_fifo(XlnxDPState *s)
@@ -806,9 +806,11 @@ static void xlnx_dp_write(void *opaque, hwaddr offset, uint64_t value,
* TODO: Power down things?
*/
break;
- case DP_AUX_WRITE_FIFO:
- xlnx_dp_aux_push_tx_fifo(s, value, 1);
+ case DP_AUX_WRITE_FIFO: {
+ uint8_t c = value;
+ xlnx_dp_aux_push_tx_fifo(s, &c, 1);
break;
+ }
case DP_AUX_CLOCK_DIVIDER:
break;
case DP_AUX_REPLY_COUNT:
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 54020aa06c..4cfbd1024a 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -51,5 +51,5 @@ obj-$(CONFIG_MIPS_ITU) += mips_itu.o
obj-$(CONFIG_PVPANIC) += pvpanic.o
obj-$(CONFIG_EDU) += edu.o
obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o
-obj-$(CONFIG_AUX) += aux.o
+obj-$(CONFIG_AUX) += auxbus.o
obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o
diff --git a/hw/misc/aux.c b/hw/misc/auxbus.c
index 25d7712398..e4a7ba41de 100644
--- a/hw/misc/aux.c
+++ b/hw/misc/auxbus.c
@@ -1,5 +1,5 @@
/*
- * aux.c
+ * auxbus.c
*
* Copyright 2015 : GreenSocs Ltd
* http://www.greensocs.com/ , email: info@greensocs.com
@@ -28,7 +28,7 @@
#include "qemu/osdep.h"
#include "qemu/log.h"
-#include "hw/misc/aux.h"
+#include "hw/misc/auxbus.h"
#include "hw/i2c/i2c.h"
#include "monitor/monitor.h"
@@ -153,12 +153,12 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address,
case WRITE_I2C_MOT:
case READ_I2C_MOT:
is_write = cmd == READ_I2C_MOT ? false : true;
+ ret = AUX_I2C_NACK;
if (!i2c_bus_busy(i2c_bus)) {
/*
* No transactions started..
*/
if (i2c_start_transfer(i2c_bus, address, is_write)) {
- ret = AUX_I2C_NACK;
break;
}
} else if ((address != bus->last_i2c_address) ||
@@ -168,22 +168,22 @@ AUXReply aux_request(AUXBus *bus, AUXCommand cmd, uint32_t address,
*/
i2c_end_transfer(i2c_bus);
if (i2c_start_transfer(i2c_bus, address, is_write)) {
- ret = AUX_I2C_NACK;
break;
}
}
+ bus->last_transaction = cmd;
+ bus->last_i2c_address = address;
while (len > 0) {
if (i2c_send_recv(i2c_bus, data++, is_write) < 0) {
- ret = AUX_I2C_NACK;
i2c_end_transfer(i2c_bus);
break;
}
len--;
}
- bus->last_transaction = cmd;
- bus->last_i2c_address = address;
- ret = AUX_I2C_ACK;
+ if (len == 0) {
+ ret = AUX_I2C_ACK;
+ }
break;
default:
DPRINTF("Not implemented!\n");
diff --git a/hw/misc/imx6_ccm.c b/hw/misc/imx6_ccm.c
index ec58eef92d..17e15d4c92 100644
--- a/hw/misc/imx6_ccm.c
+++ b/hw/misc/imx6_ccm.c
@@ -371,6 +371,12 @@ static uint32_t imx6_ccm_get_clock_frequency(IMXCCMState *dev, IMXClk clock)
case CLK_32k:
freq = CKIL_FREQ;
break;
+ case CLK_HIGH:
+ freq = 24000000;
+ break;
+ case CLK_HIGH_DIV:
+ freq = 24000000 / 8;
+ break;
default:
qemu_log_mask(LOG_GUEST_ERROR, "[%s]%s: unsupported clock %d\n",
TYPE_IMX6_CCM, __func__, clock);
diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c
index 3c2f01ab99..82bc73cb86 100644
--- a/hw/timer/imx_gpt.c
+++ b/hw/timer/imx_gpt.c
@@ -14,7 +14,6 @@
#include "qemu/osdep.h"
#include "hw/timer/imx_gpt.h"
-#include "hw/misc/imx_ccm.h"
#include "qemu/main-loop.h"
#include "qemu/log.h"
@@ -81,7 +80,18 @@ static const VMStateDescription vmstate_imx_timer_gpt = {
}
};
-static const IMXClk imx_gpt_clocks[] = {
+static const IMXClk imx25_gpt_clocks[] = {
+ CLK_NONE, /* 000 No clock source */
+ CLK_IPG, /* 001 ipg_clk, 532MHz*/
+ CLK_IPG_HIGH, /* 010 ipg_clk_highfreq */
+ CLK_NONE, /* 011 not defined */
+ CLK_32k, /* 100 ipg_clk_32k */
+ CLK_32k, /* 101 ipg_clk_32k */
+ CLK_32k, /* 110 ipg_clk_32k */
+ CLK_32k, /* 111 ipg_clk_32k */
+};
+
+static const IMXClk imx31_gpt_clocks[] = {
CLK_NONE, /* 000 No clock source */
CLK_IPG, /* 001 ipg_clk, 532MHz*/
CLK_IPG_HIGH, /* 010 ipg_clk_highfreq */
@@ -92,12 +102,23 @@ static const IMXClk imx_gpt_clocks[] = {
CLK_NONE, /* 111 not defined */
};
+static const IMXClk imx6_gpt_clocks[] = {
+ CLK_NONE, /* 000 No clock source */
+ CLK_IPG, /* 001 ipg_clk, 532MHz*/
+ CLK_IPG_HIGH, /* 010 ipg_clk_highfreq */
+ CLK_EXT, /* 011 External clock */
+ CLK_32k, /* 100 ipg_clk_32k */
+ CLK_HIGH_DIV, /* 101 reference clock / 8 */
+ CLK_NONE, /* 110 not defined */
+ CLK_HIGH, /* 111 reference clock */
+};
+
static void imx_gpt_set_freq(IMXGPTState *s)
{
uint32_t clksrc = extract32(s->cr, GPT_CR_CLKSRC_SHIFT, 3);
s->freq = imx_ccm_get_clock_frequency(s->ccm,
- imx_gpt_clocks[clksrc]) / (1 + s->pr);
+ s->clocks[clksrc]) / (1 + s->pr);
DPRINTF("Setting clksrc %d to frequency %d\n", clksrc, s->freq);
@@ -453,16 +474,52 @@ static void imx_gpt_class_init(ObjectClass *klass, void *data)
dc->desc = "i.MX general timer";
}
-static const TypeInfo imx_gpt_info = {
- .name = TYPE_IMX_GPT,
+static void imx25_gpt_init(Object *obj)
+{
+ IMXGPTState *s = IMX_GPT(obj);
+
+ s->clocks = imx25_gpt_clocks;
+}
+
+static void imx31_gpt_init(Object *obj)
+{
+ IMXGPTState *s = IMX_GPT(obj);
+
+ s->clocks = imx31_gpt_clocks;
+}
+
+static void imx6_gpt_init(Object *obj)
+{
+ IMXGPTState *s = IMX_GPT(obj);
+
+ s->clocks = imx6_gpt_clocks;
+}
+
+static const TypeInfo imx25_gpt_info = {
+ .name = TYPE_IMX25_GPT,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(IMXGPTState),
+ .instance_init = imx25_gpt_init,
.class_init = imx_gpt_class_init,
};
+static const TypeInfo imx31_gpt_info = {
+ .name = TYPE_IMX31_GPT,
+ .parent = TYPE_IMX25_GPT,
+ .instance_init = imx31_gpt_init,
+};
+
+static const TypeInfo imx6_gpt_info = {
+ .name = TYPE_IMX6_GPT,
+ .parent = TYPE_IMX25_GPT,
+ .instance_init = imx6_gpt_init,
+};
+
static void imx_gpt_register_types(void)
{
- type_register_static(&imx_gpt_info);
+ type_register_static(&imx25_gpt_info);
+ type_register_static(&imx31_gpt_info);
+ type_register_static(&imx6_gpt_info);
}
type_init(imx_gpt_register_types)
diff --git a/include/hw/display/xlnx_dp.h b/include/hw/display/xlnx_dp.h
index d3a03f118c..ee046a5fac 100644
--- a/include/hw/display/xlnx_dp.h
+++ b/include/hw/display/xlnx_dp.h
@@ -24,7 +24,7 @@
#include "hw/sysbus.h"
#include "ui/console.h"
-#include "hw/misc/aux.h"
+#include "hw/misc/auxbus.h"
#include "hw/i2c/i2c.h"
#include "hw/display/dpcd.h"
#include "hw/i2c/i2c-ddc.h"
diff --git a/include/hw/misc/aux.h b/include/hw/misc/auxbus.h
index 759c3bf20c..af39db7d79 100644
--- a/include/hw/misc/aux.h
+++ b/include/hw/misc/auxbus.h
@@ -1,5 +1,5 @@
/*
- * aux.h
+ * auxbus.h
*
* Copyright (C)2014 : GreenSocs Ltd
* http://www.greensocs.com/ , email: info@greensocs.com
diff --git a/include/hw/misc/imx_ccm.h b/include/hw/misc/imx_ccm.h
index 48a7afad5e..33cbc09952 100644
--- a/include/hw/misc/imx_ccm.h
+++ b/include/hw/misc/imx_ccm.h
@@ -46,7 +46,10 @@ typedef enum {
CLK_NONE,
CLK_IPG,
CLK_IPG_HIGH,
- CLK_32k
+ CLK_32k,
+ CLK_EXT,
+ CLK_HIGH_DIV,
+ CLK_HIGH,
} IMXClk;
typedef struct IMXCCMClass {
diff --git a/include/hw/timer/imx_gpt.h b/include/hw/timer/imx_gpt.h
index 461adbe53f..eac59b2a70 100644
--- a/include/hw/timer/imx_gpt.h
+++ b/include/hw/timer/imx_gpt.h
@@ -74,7 +74,12 @@
#define GPT_IR_OF3IE (1 << 2)
#define GPT_IR_ROVIE (1 << 5)
-#define TYPE_IMX_GPT "imx.gpt"
+#define TYPE_IMX25_GPT "imx25.gpt"
+#define TYPE_IMX31_GPT "imx31.gpt"
+#define TYPE_IMX6_GPT "imx6.gpt"
+
+#define TYPE_IMX_GPT TYPE_IMX25_GPT
+
#define IMX_GPT(obj) OBJECT_CHECK(IMXGPTState, (obj), TYPE_IMX_GPT)
typedef struct IMXGPTState{
@@ -103,6 +108,8 @@ typedef struct IMXGPTState{
uint32_t freq;
qemu_irq irq;
+
+ const IMXClk *clocks;
} IMXGPTState;
#endif /* IMX_GPT_H */
diff --git a/target-arm/arm-semi.c b/target-arm/arm-semi.c
index d50726f65d..7cac8734c7 100644
--- a/target-arm/arm-semi.c
+++ b/target-arm/arm-semi.c
@@ -565,7 +565,7 @@ target_ulong do_arm_semihosting(CPUARMState *env)
case TARGET_SYS_HEAPINFO:
{
target_ulong retvals[4];
- uint32_t limit;
+ target_ulong limit;
int i;
GET_ARG(0);