diff options
| author | Bin Meng <bmeng.cn@gmail.com> | 2019-09-20 22:41:30 -0700 |
|---|---|---|
| committer | Palmer Dabbelt <palmer@sifive.com> | 2019-10-28 07:47:27 -0700 |
| commit | 7ae05377b85fff9d4f68271fc415a43018836b4b (patch) | |
| tree | 2657a37fbcaf0ce8b3fa7430194d334aaf8c2518 | |
| parent | 37207e12245e0c5737a20b736b66b257ecf75d02 (diff) | |
riscv: hw: Drop "clock-frequency" property of cpu nodes
The "clock-frequency" property of cpu nodes isn't required. Drop it.
This is to keep in sync with Linux kernel commit below:
https://patchwork.kernel.org/patch/11133031/
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
| -rw-r--r-- | hw/riscv/sifive_u.c | 2 | ||||
| -rw-r--r-- | hw/riscv/spike.c | 2 | ||||
| -rw-r--r-- | hw/riscv/virt.c | 2 | ||||
| -rw-r--r-- | include/hw/riscv/sifive_u.h | 1 | ||||
| -rw-r--r-- | include/hw/riscv/spike.h | 4 | ||||
| -rw-r--r-- | include/hw/riscv/virt.h | 4 |
6 files changed, 0 insertions, 15 deletions
diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c index 9f8e84bf2e..02dd76176e 100644 --- a/hw/riscv/sifive_u.c +++ b/hw/riscv/sifive_u.c @@ -151,8 +151,6 @@ static void create_fdt(SiFiveUState *s, const struct MemmapEntry *memmap, char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu); char *isa; qemu_fdt_add_subnode(fdt, nodename); - qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", - SIFIVE_U_CLOCK_FREQ); /* cpu 0 is the management hart that does not have mmu */ if (cpu != 0) { qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48"); diff --git a/hw/riscv/spike.c b/hw/riscv/spike.c index d60415d190..8bbffbcd0f 100644 --- a/hw/riscv/spike.c +++ b/hw/riscv/spike.c @@ -102,8 +102,6 @@ static void create_fdt(SpikeState *s, const struct MemmapEntry *memmap, char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu); char *isa = riscv_isa_string(&s->soc.harts[cpu]); qemu_fdt_add_subnode(fdt, nodename); - qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", - SPIKE_CLOCK_FREQ); qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48"); qemu_fdt_setprop_string(fdt, nodename, "riscv,isa", isa); qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv"); diff --git a/hw/riscv/virt.c b/hw/riscv/virt.c index d36f5625ec..13030619d4 100644 --- a/hw/riscv/virt.c +++ b/hw/riscv/virt.c @@ -161,8 +161,6 @@ static void create_fdt(RISCVVirtState *s, const struct MemmapEntry *memmap, char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu); char *isa = riscv_isa_string(&s->soc.harts[cpu]); qemu_fdt_add_subnode(fdt, nodename); - qemu_fdt_setprop_cell(fdt, nodename, "clock-frequency", - VIRT_CLOCK_FREQ); qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48"); qemu_fdt_setprop_string(fdt, nodename, "riscv,isa", isa); qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv"); diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h index e4df298c23..4850805ee7 100644 --- a/include/hw/riscv/sifive_u.h +++ b/include/hw/riscv/sifive_u.h @@ -75,7 +75,6 @@ enum { }; enum { - SIFIVE_U_CLOCK_FREQ = 1000000000, SIFIVE_U_HFCLK_FREQ = 33333333, SIFIVE_U_RTCCLK_FREQ = 1000000 }; diff --git a/include/hw/riscv/spike.h b/include/hw/riscv/spike.h index 03d870363c..dc770421bc 100644 --- a/include/hw/riscv/spike.h +++ b/include/hw/riscv/spike.h @@ -38,10 +38,6 @@ enum { SPIKE_DRAM }; -enum { - SPIKE_CLOCK_FREQ = 1000000000 -}; - #if defined(TARGET_RISCV32) #define SPIKE_V1_09_1_CPU TYPE_RISCV_CPU_RV32GCSU_V1_09_1 #define SPIKE_V1_10_0_CPU TYPE_RISCV_CPU_RV32GCSU_V1_10_0 diff --git a/include/hw/riscv/virt.h b/include/hw/riscv/virt.h index 6e5fbe5d3b..68978a13e8 100644 --- a/include/hw/riscv/virt.h +++ b/include/hw/riscv/virt.h @@ -55,10 +55,6 @@ enum { VIRTIO_NDEV = 0x35 /* Arbitrary maximum number of interrupts */ }; -enum { - VIRT_CLOCK_FREQ = 1000000000 -}; - #define VIRT_PLIC_HART_CONFIG "MS" #define VIRT_PLIC_NUM_SOURCES 127 #define VIRT_PLIC_NUM_PRIORITIES 7 |