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authoraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-03 07:08:26 +0000
committeraurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>2008-11-03 07:08:26 +0000
commitf02bb954a555e997869e5a92d79b0234b39eadad (patch)
tree37a353e1c5825ae63a0b77e43570f53bf001ae67
parentabbaab5c6d243378b0161b72fb7d2e5853c3ea40 (diff)
tcg-op.h: reorder _i64 instructions common to 32- and 64-bit targets
Use the same order as the _i32 version (pure code move). Suggested by Laurent Laurent Desnogues. Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5606 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--tcg/tcg-op.h30
1 files changed, 15 insertions, 15 deletions
diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index 4f4ee189e3..f199ce0131 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -1055,21 +1055,6 @@ static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2)
}
}
-static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2,
- int label_index)
-{
- TCGv t0 = tcg_const_i64(arg2);
- tcg_gen_brcond_i64(cond, arg1, t0, label_index);
- tcg_temp_free(t0);
-}
-
-static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2)
-{
- TCGv t0 = tcg_const_i64(arg2);
- tcg_gen_mul_i64(ret, arg1, t0);
- tcg_temp_free(t0);
-}
-
static inline void tcg_gen_subfi_i64(TCGv ret, int64_t arg1, TCGv arg2)
{
TCGv t0 = tcg_const_i64(arg1);
@@ -1088,6 +1073,21 @@ static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2)
tcg_temp_free(t0);
}
}
+static inline void tcg_gen_brcondi_i64(int cond, TCGv arg1, int64_t arg2,
+ int label_index)
+{
+ TCGv t0 = tcg_const_i64(arg2);
+ tcg_gen_brcond_i64(cond, arg1, t0, label_index);
+ tcg_temp_free(t0);
+}
+
+static inline void tcg_gen_muli_i64(TCGv ret, TCGv arg1, int64_t arg2)
+{
+ TCGv t0 = tcg_const_i64(arg2);
+ tcg_gen_mul_i64(ret, arg1, t0);
+ tcg_temp_free(t0);
+}
+
/***************************************/
/* optional operations */