diff options
| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2016-06-27 08:55:18 +0200 |
|---|---|---|
| committer | David Gibson <david@gibson.dropbear.id.au> | 2016-07-01 09:57:01 +1000 |
| commit | b378bb0948277d71c78bc6d0c1ef80a253aafc80 (patch) | |
| tree | 4f73f5c4fb975c115a5a8c254c3fa58d9c16a0ec | |
| parent | d1dbe37c1ee3f14cb64a9ae3c89f637fdd08fca1 (diff) | |
ppc: Enforce setting MSR:EE,IR and DR when MSR:PR is set
The architecture specifies that any instruction that sets MSR:PR will also
set MSR:EE, IR and DR.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
| -rw-r--r-- | target-ppc/helper_regs.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target-ppc/helper_regs.h b/target-ppc/helper_regs.h index 8fc09344db..8fdfa5c7e6 100644 --- a/target-ppc/helper_regs.h +++ b/target-ppc/helper_regs.h @@ -136,6 +136,10 @@ static inline int hreg_store_msr(CPUPPCState *env, target_ulong value, /* Change the exception prefix on PowerPC 601 */ env->excp_prefix = ((value >> MSR_EP) & 1) * 0xFFF00000; } + /* If PR=1 then EE, IR and DR must be 1 */ + if ((value >> MSR_PR) & 1) { + value |= (1 << MSR_EE) | (1 << MSR_DR) | (1 << MSR_IR); + } #endif env->msr = value; hreg_compute_hflags(env); |