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authorNicholas Piggin <npiggin@gmail.com>2021-04-15 15:42:24 +1000
committerDavid Gibson <david@gibson.dropbear.id.au>2021-05-04 11:41:25 +1000
commit9827f20863df9583efb8abfa89d8cb1a4eda4884 (patch)
tree3c9d3076c3a37793694b0d2fc5905e99d4027725
parent37337472e77ee51f3d35b377684fd70368261c3d (diff)
target/ppc: Fix POWER9 radix guest HV interrupt AIL behaviour
ISA v3.0 radix guest execution has a quirk in AIL behaviour such that the LPCR[AIL] value can apply to hypervisor interrupts. This affects machines that emulate HV=1 mode (i.e., powernv9). Signed-off-by: Nicholas Piggin <npiggin@gmail.com> Message-Id: <20210415054227.1793812-2-npiggin@gmail.com> Reviewed-by: Fabiano Rosas <farosas@linux.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
-rw-r--r--target/ppc/excp_helper.c17
1 files changed, 13 insertions, 4 deletions
diff --git a/target/ppc/excp_helper.c b/target/ppc/excp_helper.c
index 5c95e0c103..344af66f66 100644
--- a/target/ppc/excp_helper.c
+++ b/target/ppc/excp_helper.c
@@ -791,14 +791,23 @@ static inline void powerpc_excp(PowerPCCPU *cpu, int excp_model, int excp)
#endif
/*
- * AIL only works if there is no HV transition and we are running
- * with translations enabled
+ * AIL only works if MSR[IR] and MSR[DR] are both enabled.
*/
- if (!((msr >> MSR_IR) & 1) || !((msr >> MSR_DR) & 1) ||
- ((new_msr & MSR_HVB) && !(msr & MSR_HVB))) {
+ if (!((msr >> MSR_IR) & 1) || !((msr >> MSR_DR) & 1)) {
ail = 0;
}
+ /*
+ * AIL does not work if there is a MSR[HV] 0->1 transition and the
+ * partition is in HPT mode. For radix guests, such interrupts are
+ * allowed to be delivered to the hypervisor in ail mode.
+ */
+ if ((new_msr & MSR_HVB) && !(msr & MSR_HVB)) {
+ if (!(env->spr[SPR_LPCR] & LPCR_HR)) {
+ ail = 0;
+ }
+ }
+
vector = env->excp_vectors[excp];
if (vector == (target_ulong)-1ULL) {
cpu_abort(cs, "Raised an exception without defined vector %d\n",