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authorRichard Henderson <rth@twiddle.net>2013-02-19 23:52:07 -0800
committerBlue Swirl <blauwirbel@gmail.com>2013-02-23 17:25:29 +0000
commite3482cb8063575f9fe0f39b701a4b6dc5a55c9cd (patch)
treef8bb27dd1e5004aba69f827daabb08bca4217b28
parentc9f10124a2704b6bab21b31e79735b18d414a654 (diff)
target-arm: Use add2 in gen_add_CC
Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
-rw-r--r--target-arm/translate.c7
1 files changed, 3 insertions, 4 deletions
diff --git a/target-arm/translate.c b/target-arm/translate.c
index efe76d04cb..ca6f0af874 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -410,12 +410,11 @@ static void gen_sub_carry(TCGv dest, TCGv t0, TCGv t1)
/* dest = T0 + T1. Compute C, N, V and Z flags */
static void gen_add_CC(TCGv dest, TCGv t0, TCGv t1)
{
- TCGv tmp;
- tcg_gen_add_i32(cpu_NF, t0, t1);
+ TCGv tmp = tcg_temp_new_i32();
+ tcg_gen_movi_i32(tmp, 0);
+ tcg_gen_add2_i32(cpu_NF, cpu_CF, t0, tmp, t1, tmp);
tcg_gen_mov_i32(cpu_ZF, cpu_NF);
- tcg_gen_setcond_i32(TCG_COND_LTU, cpu_CF, cpu_NF, t0);
tcg_gen_xor_i32(cpu_VF, cpu_NF, t0);
- tmp = tcg_temp_new_i32();
tcg_gen_xor_i32(tmp, t0, t1);
tcg_gen_andc_i32(cpu_VF, cpu_VF, tmp);
tcg_temp_free_i32(tmp);