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authorPeter Maydell <peter.maydell@linaro.org>2016-06-06 12:04:59 +0100
committerPeter Maydell <peter.maydell@linaro.org>2016-06-06 12:04:59 +0100
commitb0491a1a17de0a32e2bc6a5ab2d79a657f8cb53e (patch)
treebf1caa4d3fae9312caee3d2062e0cc9de4a0d210
parent5819e3e072f41cbf81ad80d822a5c468a91f54e0 (diff)
parent4910e6e42e5827ccc10791eef8bc98e1cb3e1adf (diff)
Merge remote-tracking branch 'remotes/rth/tags/pull-tgt-20160605' into staging
Check address ranges for disassembly # gpg: Signature made Sun 05 Jun 2016 17:30:28 BST # gpg: using RSA key 0xAD1270CC4DD0279B # gpg: Good signature from "Richard Henderson <rth7680@gmail.com>" # gpg: aka "Richard Henderson <rth@redhat.com>" # gpg: aka "Richard Henderson <rth@twiddle.net>" * remotes/rth/tags/pull-tgt-20160605: target-*: dfilter support for in_asm Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target-alpha/translate.c3
-rw-r--r--target-cris/translate.c3
-rw-r--r--target-i386/translate.c3
-rw-r--r--target-lm32/translate.c3
-rw-r--r--target-m68k/translate.c3
-rw-r--r--target-microblaze/translate.c3
-rw-r--r--target-mips/translate.c3
-rw-r--r--target-openrisc/translate.c3
-rw-r--r--target-ppc/translate.c3
-rw-r--r--target-s390x/translate.c3
-rw-r--r--target-sh4/translate.c3
-rw-r--r--target-sparc/translate.c3
-rw-r--r--target-tricore/translate.c3
-rw-r--r--target-unicore32/translate.c3
-rw-r--r--target-xtensa/translate.c3
15 files changed, 30 insertions, 15 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 76dab154ee..f9b2426636 100644
--- a/target-alpha/translate.c
+++ b/target-alpha/translate.c
@@ -2994,7 +2994,8 @@ void gen_intermediate_code(CPUAlphaState *env, struct TranslationBlock *tb)
tb->icount = num_insns;
#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(cs, pc_start, ctx.pc - pc_start, 1);
qemu_log("\n");
diff --git a/target-cris/translate.c b/target-cris/translate.c
index 2153ea7af6..cc515690e1 100644
--- a/target-cris/translate.c
+++ b/target-cris/translate.c
@@ -3311,7 +3311,8 @@ void gen_intermediate_code(CPUCRISState *env, struct TranslationBlock *tb)
#ifdef DEBUG_DISAS
#if !DISAS_CRIS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
log_target_disas(cs, pc_start, dc->pc - pc_start,
env->pregs[PR_VR]);
qemu_log("\nisize=%d osize=%d\n",
diff --git a/target-i386/translate.c b/target-i386/translate.c
index bf33e6b353..f010022fcd 100644
--- a/target-i386/translate.c
+++ b/target-i386/translate.c
@@ -8354,7 +8354,8 @@ done_generating:
gen_tb_end(tb, num_insns);
#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
int disas_flags;
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
diff --git a/target-lm32/translate.c b/target-lm32/translate.c
index d09d81447b..526b4374e6 100644
--- a/target-lm32/translate.c
+++ b/target-lm32/translate.c
@@ -1147,7 +1147,8 @@ void gen_intermediate_code(CPULM32State *env, struct TranslationBlock *tb)
tb->icount = num_insns;
#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
qemu_log("\n");
log_target_disas(cs, pc_start, dc->pc - pc_start, 0);
qemu_log("\nisize=%d osize=%d\n",
diff --git a/target-m68k/translate.c b/target-m68k/translate.c
index f90187ff96..83db42a7d3 100644
--- a/target-m68k/translate.c
+++ b/target-m68k/translate.c
@@ -3067,7 +3067,8 @@ void gen_intermediate_code(CPUM68KState *env, TranslationBlock *tb)
gen_tb_end(tb, num_insns);
#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(cs, pc_start, dc->pc - pc_start, 0);
diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 513f390807..c54304aca5 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1818,7 +1818,8 @@ void gen_intermediate_code(CPUMBState *env, struct TranslationBlock *tb)
#ifdef DEBUG_DISAS
#if !SIM_COMPAT
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
qemu_log("\n");
#if DISAS_GNU
log_target_disas(cs, pc_start, dc->pc - pc_start, 0);
diff --git a/target-mips/translate.c b/target-mips/translate.c
index 3bd96aae97..f420680d1f 100644
--- a/target-mips/translate.c
+++ b/target-mips/translate.c
@@ -19913,7 +19913,8 @@ done_generating:
#ifdef DEBUG_DISAS
LOG_DISAS("\n");
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(cs, pc_start, ctx.pc - pc_start, 0);
qemu_log("\n");
diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c
index d4f1f260e4..c08876b14a 100644
--- a/target-openrisc/translate.c
+++ b/target-openrisc/translate.c
@@ -1751,7 +1751,8 @@ void gen_intermediate_code(CPUOpenRISCState *env, struct TranslationBlock *tb)
tb->icount = num_insns;
#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
qemu_log("\n");
log_target_disas(cs, pc_start, dc->pc - pc_start, 0);
qemu_log("\nisize=%d osize=%d\n",
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index fe10bf8774..123e42fe6b 100644
--- a/target-ppc/translate.c
+++ b/target-ppc/translate.c
@@ -11642,7 +11642,8 @@ void gen_intermediate_code(CPUPPCState *env, struct TranslationBlock *tb)
tb->icount = num_insns;
#if defined(DEBUG_DISAS)
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
int flags;
flags = env->bfd_mach;
flags |= ctx.le_mode << 16;
diff --git a/target-s390x/translate.c b/target-s390x/translate.c
index 2bbd1020c9..ce5db5dd46 100644
--- a/target-s390x/translate.c
+++ b/target-s390x/translate.c
@@ -5429,7 +5429,8 @@ void gen_intermediate_code(CPUS390XState *env, struct TranslationBlock *tb)
tb->icount = num_insns;
#if defined(S390X_DEBUG_DISAS)
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(cs, pc_start, dc.pc - pc_start, 1);
qemu_log("\n");
diff --git a/target-sh4/translate.c b/target-sh4/translate.c
index ff5222b04e..7518eb5508 100644
--- a/target-sh4/translate.c
+++ b/target-sh4/translate.c
@@ -1924,7 +1924,8 @@ void gen_intermediate_code(CPUSH4State * env, struct TranslationBlock *tb)
tb->icount = num_insns;
#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
qemu_log("IN:\n"); /* , lookup_symbol(pc_start)); */
log_target_disas(cs, pc_start, ctx.pc - pc_start, 0);
qemu_log("\n");
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 21760b9fea..afd306fbab 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -5330,7 +5330,8 @@ void gen_intermediate_code(CPUSPARCState * env, TranslationBlock * tb)
tb->icount = num_insns;
#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
qemu_log("--------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(cs, pc_start, last_pc + 4 - pc_start, 0);
diff --git a/target-tricore/translate.c b/target-tricore/translate.c
index 83fa4fcd54..eb3deac889 100644
--- a/target-tricore/translate.c
+++ b/target-tricore/translate.c
@@ -8787,7 +8787,8 @@ void gen_intermediate_code(CPUTriCoreState *env, struct TranslationBlock *tb)
}
#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(cs, pc_start, ctx.pc - pc_start, 0);
qemu_log("\n");
diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c
index b04d22c9fb..c4d45fa0f4 100644
--- a/target-unicore32/translate.c
+++ b/target-unicore32/translate.c
@@ -2021,7 +2021,8 @@ done_generating:
gen_tb_end(tb, num_insns);
#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(cs, pc_start, dc->pc - pc_start, 0);
diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c
index 67efb32ef3..2a8e5c5d94 100644
--- a/target-xtensa/translate.c
+++ b/target-xtensa/translate.c
@@ -3153,7 +3153,8 @@ void gen_intermediate_code(CPUXtensaState *env, TranslationBlock *tb)
gen_tb_end(tb, insn_count);
#ifdef DEBUG_DISAS
- if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
+ if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)
+ && qemu_log_in_addr_range(pc_start)) {
qemu_log("----------------\n");
qemu_log("IN: %s\n", lookup_symbol(pc_start));
log_target_disas(cs, pc_start, dc.pc - pc_start, 0);