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authorStefan Weil <sw@weilnetz.de>2014-03-07 19:48:59 +0100
committerMichael Tokarev <mjt@tls.msk.ru>2014-03-15 13:54:18 +0400
commit3b163b0165b1eee51afd00aeae8d2ad41d05c2a2 (patch)
treefc6e7ab151abe7cccd3bb57b44f1616d0abbf84f
parentf214530f56b99be507e40cc261c9616ec84b72d3 (diff)
misc: Fix typos in comments
Codespell found and fixed these new typos: * doesnt -> doesn't * funtion -> function * perfomance -> performance * remaing -> remaining A coding style issue (line too long) was fixed manually. Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
-rw-r--r--hw/intc/arm_gic_kvm.c2
-rw-r--r--hw/net/fsl_etsec/rings.c4
-rw-r--r--target-arm/helper.c2
-rw-r--r--target-ppc/int_helper.c2
4 files changed, 5 insertions, 5 deletions
diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c
index 100b6bf3de..719d2277ec 100644
--- a/hw/intc/arm_gic_kvm.c
+++ b/hw/intc/arm_gic_kvm.c
@@ -148,7 +148,7 @@ typedef void (*vgic_translate_fn)(GICState *s, int irq, int cpu,
uint32_t *field, bool to_kernel);
/* synthetic translate function used for clear/set registers to completely
- * clear a setting using a clear-register before setting the remaing bits
+ * clear a setting using a clear-register before setting the remaining bits
* using a set-register */
static void translate_clear(GICState *s, int irq, int cpu,
uint32_t *field, bool to_kernel)
diff --git a/hw/net/fsl_etsec/rings.c b/hw/net/fsl_etsec/rings.c
index 77602722b3..26b71f6e81 100644
--- a/hw/net/fsl_etsec/rings.c
+++ b/hw/net/fsl_etsec/rings.c
@@ -195,8 +195,8 @@ static void process_tx_fcb(eTSEC *etsec)
/* if packet is IP4 and IP checksum is requested */
if (flags & FCB_TX_IP && flags & FCB_TX_CIP) {
- /* do IP4 checksum (TODO This funtion does TCP/UDP checksum but not sure
- * if it also does IP4 checksum. */
+ /* do IP4 checksum (TODO This function does TCP/UDP checksum
+ * but not sure if it also does IP4 checksum.) */
net_checksum_calculate(etsec->tx_buffer + 8,
etsec->tx_buffer_len - 8);
}
diff --git a/target-arm/helper.c b/target-arm/helper.c
index aa5f22d14f..f0a1fd48e6 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -488,7 +488,7 @@ static const ARMCPRegInfo v6_cp_reginfo[] = {
static CPAccessResult pmreg_access(CPUARMState *env, const ARMCPRegInfo *ri)
{
- /* Perfomance monitor registers user accessibility is controlled
+ /* Performance monitor registers user accessibility is controlled
* by PMUSERENR.
*/
if (arm_current_pl(env) == 0 && !env->cp15.c9_pmuserenr) {
diff --git a/target-ppc/int_helper.c b/target-ppc/int_helper.c
index 63dde94b04..e14e304457 100644
--- a/target-ppc/int_helper.c
+++ b/target-ppc/int_helper.c
@@ -2216,7 +2216,7 @@ static int bcd_cmp_mag(ppc_avr_t *a, ppc_avr_t *b)
uint8_t dig_a = bcd_get_digit(a, i, &invalid);
uint8_t dig_b = bcd_get_digit(b, i, &invalid);
if (unlikely(invalid)) {
- return 0; /* doesnt matter */
+ return 0; /* doesn't matter */
} else if (dig_a > dig_b) {
return 1;
} else if (dig_a < dig_b) {