diff options
| author | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-10 15:02:33 +0000 |
|---|---|---|
| committer | aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-12-10 15:02:33 +0000 |
| commit | 4c2ab988693eead8798dd4e199281012eaaba3a0 (patch) | |
| tree | c9afdc79712242ce219b56fbcc021fcfa82f93d0 | |
| parent | fe463b7dbc16cc66f3b9a8b7be197fb340378fa3 (diff) | |
target-ppc: enable SPE and Altivec in user mode
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5965 c046a42c-6fe2-441c-8c8c-71466251a162
| -rw-r--r-- | target-ppc/helper.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/target-ppc/helper.c b/target-ppc/helper.c index 689291ccb2..33e8b3ba5b 100644 --- a/target-ppc/helper.c +++ b/target-ppc/helper.c @@ -2903,6 +2903,8 @@ void cpu_ppc_reset (void *opaque) #endif #if defined(CONFIG_USER_ONLY) msr |= (target_ulong)1 << MSR_FP; /* Allow floating point usage */ + msr |= (target_ulong)1 << MSR_VR; /* Allow altivec usage */ + msr |= (target_ulong)1 << MSR_SPE; /* Allow SPE usage */ msr |= (target_ulong)1 << MSR_PR; env->msr = msr & env->msr_mask; #else |