diff options
author | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-09-18 01:15:29 +0000 |
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committer | pbrook <pbrook@c046a42c-6fe2-441c-8c8c-71466251a162> | 2006-09-18 01:15:29 +0000 |
commit | aef445bd7e46d2d47701a03c5478da34b3d53c4c (patch) | |
tree | 0f9a7993dad66b412e857a25f6cd56f3313e7a37 | |
parent | 6787f5fae0fb9e3923b8c316780645c3e1d81df2 (diff) |
Merge common ISA access routines.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2159 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r-- | Makefile.target | 2 | ||||
-rw-r--r-- | hw/isa_mmio.c | 102 | ||||
-rw-r--r-- | hw/mips_r4k.c | 86 | ||||
-rw-r--r-- | hw/ppc.c | 58 | ||||
-rw-r--r-- | hw/ppc_chrp.c | 10 | ||||
-rw-r--r-- | vl.h | 2 |
6 files changed, 110 insertions, 150 deletions
diff --git a/Makefile.target b/Makefile.target index 89b44144dd..d61b8e5d09 100644 --- a/Makefile.target +++ b/Makefile.target @@ -289,7 +289,7 @@ ifeq ($(ARCH),alpha) endif # must use static linking to avoid leaving stuff in virtual address space -VL_OBJS=vl.o osdep.o readline.o monitor.o pci.o console.o loader.o +VL_OBJS=vl.o osdep.o readline.o monitor.o pci.o console.o loader.o isa_mmio.o VL_OBJS+=block.o block-raw.o VL_OBJS+=block-cow.o block-qcow.o aes.o block-vmdk.o block-cloop.o block-dmg.o block-bochs.o block-vpc.o block-vvfat.o block-qcow2.o ifdef CONFIG_WIN32 diff --git a/hw/isa_mmio.c b/hw/isa_mmio.c new file mode 100644 index 0000000000..070f6f587a --- /dev/null +++ b/hw/isa_mmio.c @@ -0,0 +1,102 @@ +/* + * Memory mapped access to ISA IO space. + * + * Copyright (c) 2006 Fabrice Bellard + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + */ + +#include "vl.h" + +static void isa_mmio_writeb (void *opaque, target_phys_addr_t addr, + uint32_t val) +{ + cpu_outb(NULL, addr & 0xffff, val); +} + +static void isa_mmio_writew (void *opaque, target_phys_addr_t addr, + uint32_t val) +{ +#ifdef TARGET_WORDS_BIGENDIAN + val = bswap16(val); +#endif + cpu_outw(NULL, addr & 0xffff, val); +} + +static void isa_mmio_writel (void *opaque, target_phys_addr_t addr, + uint32_t val) +{ +#ifdef TARGET_WORDS_BIGENDIAN + val = bswap32(val); +#endif + cpu_outl(NULL, addr & 0xffff, val); +} + +static uint32_t isa_mmio_readb (void *opaque, target_phys_addr_t addr) +{ + uint32_t val; + + val = cpu_inb(NULL, addr & 0xffff); + return val; +} + +static uint32_t isa_mmio_readw (void *opaque, target_phys_addr_t addr) +{ + uint32_t val; + + val = cpu_inw(NULL, addr & 0xffff); +#ifdef TARGET_WORDS_BIGENDIAN + val = bswap16(val); +#endif + return val; +} + +static uint32_t isa_mmio_readl (void *opaque, target_phys_addr_t addr) +{ + uint32_t val; + + val = cpu_inl(NULL, addr & 0xffff); +#ifdef TARGET_WORDS_BIGENDIAN + val = bswap32(val); +#endif + return val; +} + +static CPUWriteMemoryFunc *isa_mmio_write[] = { + &isa_mmio_writeb, + &isa_mmio_writew, + &isa_mmio_writel, +}; + +static CPUReadMemoryFunc *isa_mmio_read[] = { + &isa_mmio_readb, + &isa_mmio_readw, + &isa_mmio_readl, +}; + +static int isa_mmio_iomemtype = 0; + +void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size) +{ + if (!isa_mmio_iomemtype) { + isa_mmio_iomemtype = cpu_register_io_memory(0, isa_mmio_read, + isa_mmio_write, NULL); + } + cpu_register_physical_memory(base, size, isa_mmio_iomemtype); +} diff --git a/hw/mips_r4k.c b/hw/mips_r4k.c index bad9163192..075b16cb47 100644 --- a/hw/mips_r4k.c +++ b/hw/mips_r4k.c @@ -107,88 +107,6 @@ void cpu_mips_clock_init (CPUState *env) } -static void io_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) -{ -#if 0 - if (logfile) - fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value); -#endif - cpu_outb(NULL, addr & 0xffff, value); -} - -static uint32_t io_readb (void *opaque, target_phys_addr_t addr) -{ - uint32_t ret = cpu_inb(NULL, addr & 0xffff); -#if 0 - if (logfile) - fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret); -#endif - return ret; -} - -static void io_writew (void *opaque, target_phys_addr_t addr, uint32_t value) -{ -#if 0 - if (logfile) - fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value); -#endif -#ifdef TARGET_WORDS_BIGENDIAN - value = bswap16(value); -#endif - cpu_outw(NULL, addr & 0xffff, value); -} - -static uint32_t io_readw (void *opaque, target_phys_addr_t addr) -{ - uint32_t ret = cpu_inw(NULL, addr & 0xffff); -#ifdef TARGET_WORDS_BIGENDIAN - ret = bswap16(ret); -#endif -#if 0 - if (logfile) - fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret); -#endif - return ret; -} - -static void io_writel (void *opaque, target_phys_addr_t addr, uint32_t value) -{ -#if 0 - if (logfile) - fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, value); -#endif -#ifdef TARGET_WORDS_BIGENDIAN - value = bswap32(value); -#endif - cpu_outl(NULL, addr & 0xffff, value); -} - -static uint32_t io_readl (void *opaque, target_phys_addr_t addr) -{ - uint32_t ret = cpu_inl(NULL, addr & 0xffff); - -#ifdef TARGET_WORDS_BIGENDIAN - ret = bswap32(ret); -#endif -#if 0 - if (logfile) - fprintf(logfile, "%s: addr %08x val %08x\n", __func__, addr, ret); -#endif - return ret; -} - -CPUWriteMemoryFunc *io_write[] = { - &io_writeb, - &io_writew, - &io_writel, -}; - -CPUReadMemoryFunc *io_read[] = { - &io_readb, - &io_readw, - &io_readl, -}; - void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, DisplayState *ds, const char **fd_filename, int snapshot, const char *kernel_filename, const char *kernel_cmdline, @@ -197,7 +115,6 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, char buf[1024]; int64_t entry = 0; unsigned long bios_offset; - int io_memory; int ret; CPUState *env; long kernel_size; @@ -263,8 +180,7 @@ void mips_r4k_init (int ram_size, int vga_ram_size, int boot_device, cpu_mips_irqctrl_init(); /* Register 64 KB of ISA IO space at 0x14000000 */ - io_memory = cpu_register_io_memory(0, io_read, io_write, NULL); - cpu_register_physical_memory(0x14000000, 0x00010000, io_memory); + isa_mmio_init(0x14000000, 0x00010000); isa_mem_base = 0x10000000; isa_pic = pic_init(pic_irq_request, env); @@ -201,64 +201,6 @@ void cpu_ppc_reset (CPUState *env) } #endif -static void PPC_io_writeb (void *opaque, target_phys_addr_t addr, uint32_t value) -{ - cpu_outb(NULL, addr & 0xffff, value); -} - -static uint32_t PPC_io_readb (void *opaque, target_phys_addr_t addr) -{ - uint32_t ret = cpu_inb(NULL, addr & 0xffff); - return ret; -} - -static void PPC_io_writew (void *opaque, target_phys_addr_t addr, uint32_t value) -{ -#ifdef TARGET_WORDS_BIGENDIAN - value = bswap16(value); -#endif - cpu_outw(NULL, addr & 0xffff, value); -} - -static uint32_t PPC_io_readw (void *opaque, target_phys_addr_t addr) -{ - uint32_t ret = cpu_inw(NULL, addr & 0xffff); -#ifdef TARGET_WORDS_BIGENDIAN - ret = bswap16(ret); -#endif - return ret; -} - -static void PPC_io_writel (void *opaque, target_phys_addr_t addr, uint32_t value) -{ -#ifdef TARGET_WORDS_BIGENDIAN - value = bswap32(value); -#endif - cpu_outl(NULL, addr & 0xffff, value); -} - -static uint32_t PPC_io_readl (void *opaque, target_phys_addr_t addr) -{ - uint32_t ret = cpu_inl(NULL, addr & 0xffff); - -#ifdef TARGET_WORDS_BIGENDIAN - ret = bswap32(ret); -#endif - return ret; -} - -CPUWriteMemoryFunc *PPC_io_write[] = { - &PPC_io_writeb, - &PPC_io_writew, - &PPC_io_writel, -}; - -CPUReadMemoryFunc *PPC_io_read[] = { - &PPC_io_readb, - &PPC_io_readw, - &PPC_io_readl, -}; - /*****************************************************************************/ /* Debug port */ void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val) diff --git a/hw/ppc_chrp.c b/hw/ppc_chrp.c index 94707690ed..7599eab915 100644 --- a/hw/ppc_chrp.c +++ b/hw/ppc_chrp.c @@ -305,7 +305,7 @@ static void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device, SetIRQFunc *set_irq; void *pic; m48t59_t *nvram; - int PPC_io_memory, unin_memory; + int unin_memory; int linux_boot, i; unsigned long bios_offset, vga_bios_offset; uint32_t kernel_base, kernel_size, initrd_base, initrd_size; @@ -417,9 +417,8 @@ static void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device, isa_mem_base = 0x80000000; /* Register 2 MB of ISA IO space */ - PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL); - cpu_register_physical_memory(0xfe000000, 0x00200000, PPC_io_memory); - + isa_mmio_init(0xfe000000, 0x00200000); + /* init basic PC hardware */ pic = heathrow_pic_init(&heathrow_pic_mem_index); set_irq = heathrow_pic_set_irq; @@ -463,8 +462,7 @@ static void ppc_chrp_init(int ram_size, int vga_ram_size, int boot_device, isa_mem_base = 0x80000000; /* Register 8 MB of ISA IO space */ - PPC_io_memory = cpu_register_io_memory(0, PPC_io_read, PPC_io_write, NULL); - cpu_register_physical_memory(0xF2000000, 0x00800000, PPC_io_memory); + isa_mmio_init(0xf2000000, 0x00800000); /* UniN init */ unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL); @@ -675,6 +675,8 @@ int register_ioport_write(int start, int length, int size, IOPortWriteFunc *func, void *opaque); void isa_unassign_ioport(int start, int length); +void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size); + /* PCI bus */ extern target_phys_addr_t pci_mem_base; |