diff options
| author | Andreas Färber <afaerber@suse.de> | 2012-08-20 19:07:57 +0200 |
|---|---|---|
| committer | Anthony Liguori <aliguori@us.ibm.com> | 2012-08-22 10:47:15 -0500 |
| commit | 94dd91d651fe821971411280f8c64a6b72e8ca64 (patch) | |
| tree | 127ad9235c311a9b1585887f8d8a467fbac5e7d9 | |
| parent | 4240abff5a6fb5d88867b51f46c0235518dac564 (diff) | |
alpha_typhoon: QOM'ify Typhoon PCI host bridge
Introduce type constant and cast macro. Don't access DeviceState
or PCIHostState indirectly through parent fields.
Signed-off-by: Andreas Färber <afaerber@suse.de>
Acked-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
| -rw-r--r-- | hw/alpha_typhoon.c | 20 |
1 files changed, 13 insertions, 7 deletions
diff --git a/hw/alpha_typhoon.c b/hw/alpha_typhoon.c index cc637375c8..10e588af9d 100644 --- a/hw/alpha_typhoon.c +++ b/hw/alpha_typhoon.c @@ -15,6 +15,8 @@ #include "exec-memory.h" +#define TYPE_TYPHOON_PCI_HOST_BRIDGE "typhoon-pcihost" + typedef struct TyphoonCchip { MemoryRegion region; uint64_t misc; @@ -40,8 +42,12 @@ typedef struct TyphoonPchip { TyphoonWindow win[4]; } TyphoonPchip; +#define TYPHOON_PCI_HOST_BRIDGE(obj) \ + OBJECT_CHECK(TyphoonState, (obj), TYPE_TYPHOON_PCI_HOST_BRIDGE) + typedef struct TyphoonState { PCIHostState host; + TyphoonCchip cchip; TyphoonPchip pchip; MemoryRegion dchip_region; @@ -700,16 +706,16 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, MemoryRegion *addr_space = get_system_memory(); MemoryRegion *addr_space_io = get_system_io(); DeviceState *dev; - PCIHostState *p; TyphoonState *s; + PCIHostState *phb; PCIBus *b; int i; - dev = qdev_create(NULL, "typhoon-pcihost"); + dev = qdev_create(NULL, TYPE_TYPHOON_PCI_HOST_BRIDGE); qdev_init_nofail(dev); - p = FROM_SYSBUS(PCIHostState, sysbus_from_qdev(dev)); - s = container_of(p, TyphoonState, host); + s = TYPHOON_PCI_HOST_BRIDGE(dev); + phb = FROM_SYSBUS(PCIHostState, SYS_BUS_DEVICE(dev)); /* Remember the CPUs so that we can deliver interrupts to them. */ for (i = 0; i < 4; i++) { @@ -763,10 +769,10 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **isa_bus, memory_region_add_subregion(addr_space, 0x801fc000000ULL, &s->pchip.reg_io); - b = pci_register_bus(&s->host.busdev.qdev, "pci", + b = pci_register_bus(dev, "pci", typhoon_set_irq, sys_map_irq, s, &s->pchip.reg_mem, addr_space_io, 0, 64); - s->host.bus = b; + phb->bus = b; /* Pchip0 PCI special/interrupt acknowledge, 0x801.F800.0000, 64MB. */ memory_region_init_io(&s->pchip.reg_iack, &alpha_pci_iack_ops, b, @@ -818,7 +824,7 @@ static void typhoon_pcihost_class_init(ObjectClass *klass, void *data) } static const TypeInfo typhoon_pcihost_info = { - .name = "typhoon-pcihost", + .name = TYPE_TYPHOON_PCI_HOST_BRIDGE, .parent = TYPE_SYS_BUS_DEVICE, .instance_size = sizeof(TyphoonState), .class_init = typhoon_pcihost_class_init, |