diff options
author | Paolo Bonzini <pbonzini@redhat.com> | 2014-11-26 13:39:59 +0300 |
---|---|---|
committer | Paolo Bonzini <pbonzini@redhat.com> | 2015-01-03 09:22:10 +0100 |
commit | bd79255d2571a3c68820117caf94ea9afe1d527e (patch) | |
tree | 4bce9a3c428732e82da94e6f5d12948e17fea9f7 | |
parent | 0266359e57987d6be53fbcb885f2dd39c1dae940 (diff) |
translate: check cflags instead of use_icount global
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Pavel Dovgalyuk <pavel.dovgaluk@ispras.ru>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r-- | target-alpha/translate.c | 8 | ||||
-rw-r--r-- | target-arm/translate-a64.c | 4 | ||||
-rw-r--r-- | target-arm/translate.c | 4 | ||||
-rw-r--r-- | target-i386/translate.c | 50 | ||||
-rw-r--r-- | target-lm32/translate.c | 8 | ||||
-rw-r--r-- | target-mips/translate.c | 24 | ||||
-rw-r--r-- | target-ppc/translate_init.c | 24 | ||||
-rw-r--r-- | translate-all.c | 2 |
8 files changed, 69 insertions, 55 deletions
diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 76658a074a..5387b93084 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -1285,7 +1285,7 @@ static int cpu_pr_data(int pr) return 0; } -static ExitStatus gen_mfpr(TCGv va, int regno) +static ExitStatus gen_mfpr(DisasContext *ctx, TCGv va, int regno) { int data = cpu_pr_data(regno); @@ -1295,7 +1295,7 @@ static ExitStatus gen_mfpr(TCGv va, int regno) if (regno == 249) { helper = gen_helper_get_vmtime; } - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); helper(va); gen_io_end(); @@ -2283,7 +2283,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn) case 0xC000: /* RPCC */ va = dest_gpr(ctx, ra); - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); gen_helper_load_pcc(va, cpu_env); gen_io_end(); @@ -2317,7 +2317,7 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn) #ifndef CONFIG_USER_ONLY REQUIRE_TB_FLAG(TB_FLAGS_PAL_MODE); va = dest_gpr(ctx, ra); - ret = gen_mfpr(va, insn & 0xffff); + ret = gen_mfpr(ctx, va, insn & 0xffff); break; #else goto invalid_opc; diff --git a/target-arm/translate-a64.c b/target-arm/translate-a64.c index 80d2c07e82..c78ebde440 100644 --- a/target-arm/translate-a64.c +++ b/target-arm/translate-a64.c @@ -1372,7 +1372,7 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread, break; } - if (use_icount && (ri->type & ARM_CP_IO)) { + if ((s->tb->cflags & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) { gen_io_start(); } @@ -1403,7 +1403,7 @@ static void handle_sys(DisasContext *s, uint32_t insn, bool isread, } } - if (use_icount && (ri->type & ARM_CP_IO)) { + if ((s->tb->cflags & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) { /* I/O operations must end the TB here (whether read or write) */ gen_io_end(); s->is_jmp = DISAS_UPDATE; diff --git a/target-arm/translate.c b/target-arm/translate.c index b52c758698..f5a8482fbe 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -7170,7 +7170,7 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn) break; } - if (use_icount && (ri->type & ARM_CP_IO)) { + if ((s->tb->cflags & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) { gen_io_start(); } @@ -7261,7 +7261,7 @@ static int disas_coproc_insn(DisasContext *s, uint32_t insn) } } - if (use_icount && (ri->type & ARM_CP_IO)) { + if ((s->tb->cflags & CF_USE_ICOUNT) && (ri->type & ARM_CP_IO)) { /* I/O operations must end the TB here (whether read or write) */ gen_io_end(); gen_lookup_tb(s); diff --git a/target-i386/translate.c b/target-i386/translate.c index fc75da7fc0..0792bd0bbe 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -1168,8 +1168,9 @@ static inline void gen_cmps(DisasContext *s, TCGMemOp ot) static inline void gen_ins(DisasContext *s, TCGMemOp ot) { - if (use_icount) + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); + } gen_string_movl_A0_EDI(s); /* Note: we must do this dummy write first to be restartable in case of page fault. */ @@ -1181,14 +1182,16 @@ static inline void gen_ins(DisasContext *s, TCGMemOp ot) gen_op_st_v(s, ot, cpu_T[0], cpu_A0); gen_op_movl_T0_Dshift(ot); gen_op_add_reg_T0(s->aflag, R_EDI); - if (use_icount) + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); + } } static inline void gen_outs(DisasContext *s, TCGMemOp ot) { - if (use_icount) + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); + } gen_string_movl_A0_ESI(s); gen_op_ld_v(s, ot, cpu_T[0], cpu_A0); @@ -1199,8 +1202,9 @@ static inline void gen_outs(DisasContext *s, TCGMemOp ot) gen_op_movl_T0_Dshift(ot); gen_op_add_reg_T0(s->aflag, R_ESI); - if (use_icount) + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); + } } /* same method as Valgrind : we generate jumps to current or next @@ -6278,7 +6282,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_repz_ins(s, ot, pc_start - s->cs_base, s->pc - s->cs_base); } else { gen_ins(s, ot); - if (use_icount) { + if (s->tb->cflags & CF_USE_ICOUNT) { gen_jmp(s, s->pc - s->cs_base); } } @@ -6293,7 +6297,7 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, gen_repz_outs(s, ot, pc_start - s->cs_base, s->pc - s->cs_base); } else { gen_outs(s, ot); - if (use_icount) { + if (s->tb->cflags & CF_USE_ICOUNT) { gen_jmp(s, s->pc - s->cs_base); } } @@ -6309,12 +6313,13 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, tcg_gen_movi_tl(cpu_T[0], val); gen_check_io(s, ot, pc_start - s->cs_base, SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes)); - if (use_icount) + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); + } tcg_gen_movi_i32(cpu_tmp2_i32, val); gen_helper_in_func(ot, cpu_T[1], cpu_tmp2_i32); gen_op_mov_reg_v(ot, R_EAX, cpu_T[1]); - if (use_icount) { + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); gen_jmp(s, s->pc - s->cs_base); } @@ -6328,12 +6333,13 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, svm_is_rep(prefixes)); gen_op_mov_v_reg(ot, cpu_T[1], R_EAX); - if (use_icount) + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); + } tcg_gen_movi_i32(cpu_tmp2_i32, val); tcg_gen_trunc_tl_i32(cpu_tmp3_i32, cpu_T[1]); gen_helper_out_func(ot, cpu_tmp2_i32, cpu_tmp3_i32); - if (use_icount) { + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); gen_jmp(s, s->pc - s->cs_base); } @@ -6344,12 +6350,13 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, tcg_gen_ext16u_tl(cpu_T[0], cpu_regs[R_EDX]); gen_check_io(s, ot, pc_start - s->cs_base, SVM_IOIO_TYPE_MASK | svm_is_rep(prefixes)); - if (use_icount) + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); + } tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); gen_helper_in_func(ot, cpu_T[1], cpu_tmp2_i32); gen_op_mov_reg_v(ot, R_EAX, cpu_T[1]); - if (use_icount) { + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); gen_jmp(s, s->pc - s->cs_base); } @@ -6362,12 +6369,13 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, svm_is_rep(prefixes)); gen_op_mov_v_reg(ot, cpu_T[1], R_EAX); - if (use_icount) + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); + } tcg_gen_trunc_tl_i32(cpu_tmp2_i32, cpu_T[0]); tcg_gen_trunc_tl_i32(cpu_tmp3_i32, cpu_T[1]); gen_helper_out_func(ot, cpu_tmp2_i32, cpu_tmp3_i32); - if (use_icount) { + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); gen_jmp(s, s->pc - s->cs_base); } @@ -7065,10 +7073,11 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, case 0x131: /* rdtsc */ gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); - if (use_icount) + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); + } gen_helper_rdtsc(cpu_env); - if (use_icount) { + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); gen_jmp(s, s->pc - s->cs_base); } @@ -7451,10 +7460,11 @@ static target_ulong disas_insn(CPUX86State *env, DisasContext *s, goto illegal_op; gen_update_cc_op(s); gen_jmp_im(pc_start - s->cs_base); - if (use_icount) + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); + } gen_helper_rdtscp(cpu_env); - if (use_icount) { + if (s->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); gen_jmp(s, s->pc - s->cs_base); } @@ -7962,7 +7972,7 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu, record/replay modes and there will always be an additional step for ecx=0 when icount is enabled. */ - dc->repz_opt = !dc->jmp_opt && !use_icount; + dc->repz_opt = !dc->jmp_opt && !(tb->cflags & CF_USE_ICOUNT); #if 0 /* check addseg logic */ if (!dc->addseg && (dc->vm86 || !dc->pe || !dc->code32)) @@ -8040,7 +8050,7 @@ static inline void gen_intermediate_code_internal(X86CPU *cpu, If current instruction already crossed the bound - it's ok, because an exception hasn't stopped this code. */ - if (use_icount + if ((tb->cflags & CF_USE_ICOUNT) && ((pc_ptr & TARGET_PAGE_MASK) != ((pc_ptr + TARGET_MAX_INSN_SIZE - 1) & TARGET_PAGE_MASK) || (pc_ptr & ~TARGET_PAGE_MASK) == 0)) { diff --git a/target-lm32/translate.c b/target-lm32/translate.c index 8454e8b517..f748f96ebb 100644 --- a/target-lm32/translate.c +++ b/target-lm32/translate.c @@ -865,24 +865,24 @@ static void dec_wcsr(DisasContext *dc) break; case CSR_IM: /* mark as an io operation because it could cause an interrupt */ - if (use_icount) { + if (dc->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_wcsr_im(cpu_env, cpu_R[dc->r1]); tcg_gen_movi_tl(cpu_pc, dc->pc + 4); - if (use_icount) { + if (dc->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); } dc->is_jmp = DISAS_UPDATE; break; case CSR_IP: /* mark as an io operation because it could cause an interrupt */ - if (use_icount) { + if (dc->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_wcsr_ip(cpu_env, cpu_R[dc->r1]); tcg_gen_movi_tl(cpu_pc, dc->pc + 4); - if (use_icount) { + if (dc->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); } dc->is_jmp = DISAS_UPDATE; diff --git a/target-mips/translate.c b/target-mips/translate.c index 1205909f78..2fcd330c41 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -5123,10 +5123,11 @@ static void gen_mfc0(DisasContext *ctx, TCGv arg, int reg, int sel) switch (sel) { case 0: /* Mark as an IO operation because we read the time. */ - if (use_icount) + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); + } gen_helper_mfc0_count(arg, cpu_env); - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); } /* Break the TB to be able to take timer interrupts immediately @@ -5499,8 +5500,9 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel) if (sel != 0) check_insn(ctx, ISA_MIPS32); - if (use_icount) + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); + } switch (reg) { case 0: @@ -6118,7 +6120,7 @@ static void gen_mtc0(DisasContext *ctx, TCGv arg, int reg, int sel) (void)rn; /* avoid a compiler warning */ LOG_DISAS("mtc0 %s (reg %d sel %d)\n", rn, reg, sel); /* For simplicity assume that all writes can cause interrupts. */ - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); ctx->bstate = BS_STOP; } @@ -6369,10 +6371,11 @@ static void gen_dmfc0(DisasContext *ctx, TCGv arg, int reg, int sel) switch (sel) { case 0: /* Mark as an IO operation because we read the time. */ - if (use_icount) + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); + } gen_helper_mfc0_count(arg, cpu_env); - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); } /* Break the TB to be able to take timer interrupts immediately @@ -6738,8 +6741,9 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel) if (sel != 0) check_insn(ctx, ISA_MIPS64); - if (use_icount) + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); + } switch (reg) { case 0: @@ -7045,11 +7049,11 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel) save_cpu_state(ctx, 1); /* Mark as an IO operation because we may trigger a software interrupt. */ - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_mtc0_cause(cpu_env, arg); - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); } /* Stop translation as we may have triggered an intetrupt */ @@ -7358,7 +7362,7 @@ static void gen_dmtc0(DisasContext *ctx, TCGv arg, int reg, int sel) (void)rn; /* avoid a compiler warning */ LOG_DISAS("dmtc0 %s (reg %d sel %d)\n", rn, reg, sel); /* For simplicity assume that all writes can cause interrupts. */ - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); ctx->bstate = BS_STOP; } diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 5908a954bd..f0a29992df 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -188,11 +188,11 @@ static void spr_write_ureg(DisasContext *ctx, int sprn, int gprn) #if !defined(CONFIG_USER_ONLY) static void spr_read_decr (DisasContext *ctx, int gprn, int sprn) { - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_load_decr(cpu_gpr[gprn], cpu_env); - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); gen_stop_exception(ctx); } @@ -200,11 +200,11 @@ static void spr_read_decr (DisasContext *ctx, int gprn, int sprn) static void spr_write_decr (DisasContext *ctx, int sprn, int gprn) { - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_store_decr(cpu_env, cpu_gpr[gprn]); - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); gen_stop_exception(ctx); } @@ -215,11 +215,11 @@ static void spr_write_decr (DisasContext *ctx, int sprn, int gprn) /* Time base */ static void spr_read_tbl (DisasContext *ctx, int gprn, int sprn) { - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_load_tbl(cpu_gpr[gprn], cpu_env); - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); gen_stop_exception(ctx); } @@ -227,11 +227,11 @@ static void spr_read_tbl (DisasContext *ctx, int gprn, int sprn) static void spr_read_tbu (DisasContext *ctx, int gprn, int sprn) { - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_load_tbu(cpu_gpr[gprn], cpu_env); - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); gen_stop_exception(ctx); } @@ -252,11 +252,11 @@ static void spr_read_atbu (DisasContext *ctx, int gprn, int sprn) #if !defined(CONFIG_USER_ONLY) static void spr_write_tbl (DisasContext *ctx, int sprn, int gprn) { - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_store_tbl(cpu_env, cpu_gpr[gprn]); - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); gen_stop_exception(ctx); } @@ -264,11 +264,11 @@ static void spr_write_tbl (DisasContext *ctx, int sprn, int gprn) static void spr_write_tbu (DisasContext *ctx, int sprn, int gprn) { - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_start(); } gen_helper_store_tbu(cpu_env, cpu_gpr[gprn]); - if (use_icount) { + if (ctx->tb->cflags & CF_USE_ICOUNT) { gen_io_end(); gen_stop_exception(ctx); } diff --git a/translate-all.c b/translate-all.c index db2102dd52..8fa4378055 100644 --- a/translate-all.c +++ b/translate-all.c @@ -218,7 +218,7 @@ static int cpu_restore_state_from_tb(CPUState *cpu, TranslationBlock *tb, gen_intermediate_code_pc(env, tb); - if (use_icount) { + if (tb->cflags & CF_USE_ICOUNT) { /* Reset the cycle counter to the start of the block. */ cpu->icount_decr.u16.low += tb->icount; /* Clear the IO flag. */ |