diff options
author | Benoît Canet <benoit.canet@gmail.com> | 2011-12-16 23:37:46 +0100 |
---|---|---|
committer | Anthony Liguori <aliguori@us.ibm.com> | 2011-12-19 13:36:27 -0600 |
commit | 8c106233ab179deb6faa8914b6103d3e68431b4b (patch) | |
tree | 8d9947c79df30e8703af229a929437f0e80c66c7 | |
parent | ca2cc7888846ab85ee6549bb0b68ac0cbf16a4e9 (diff) |
sh_pci: remove sysbus_init_mmio_cb2 usage
The isa region is not exposed as a sysbus region because the iobr
register contains its address and use it to remap dynamically
the region. (Peter Maydell's idea)
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Benoît Canet <benoit.canet@gmail.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
-rw-r--r-- | hw/r2d.c | 14 | ||||
-rw-r--r-- | hw/sh_pci.c | 29 |
2 files changed, 16 insertions, 27 deletions
@@ -231,6 +231,8 @@ static void r2d_init(ram_addr_t ram_size, qemu_irq *irq; DriveInfo *dinfo; int i; + DeviceState *dev; + SysBusDevice *busdev; MemoryRegion *address_space_mem = get_system_memory(); if (!cpu_model) @@ -252,8 +254,16 @@ static void r2d_init(ram_addr_t ram_size, /* Register peripherals */ s = sh7750_init(env, address_space_mem); irq = r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s)); - sysbus_create_varargs("sh_pci", 0x1e200000, irq[PCI_INTA], irq[PCI_INTB], - irq[PCI_INTC], irq[PCI_INTD], NULL); + + dev = qdev_create(NULL, "sh_pci"); + busdev = sysbus_from_qdev(dev); + qdev_init_nofail(dev); + sysbus_mmio_map(busdev, 0, P4ADDR(0x1e200000)); + sysbus_mmio_map(busdev, 1, A7ADDR(0x1e200000)); + sysbus_connect_irq(busdev, 0, irq[PCI_INTA]); + sysbus_connect_irq(busdev, 1, irq[PCI_INTB]); + sysbus_connect_irq(busdev, 2, irq[PCI_INTC]); + sysbus_connect_irq(busdev, 3, irq[PCI_INTD]); sm501_init(address_space_mem, 0x10000000, SM501_VRAM_SIZE, irq[SM501], serial_hds[2]); diff --git a/hw/sh_pci.c b/hw/sh_pci.c index 86f468e500..d4d028d811 100644 --- a/hw/sh_pci.c +++ b/hw/sh_pci.c @@ -110,29 +110,6 @@ static void sh_pci_set_irq(void *opaque, int irq_num, int level) qemu_set_irq(pic[irq_num], level); } -static void sh_pci_map(SysBusDevice *dev, target_phys_addr_t base) -{ - SHPCIState *s = FROM_SYSBUS(SHPCIState, dev); - - memory_region_add_subregion(get_system_memory(), - P4ADDR(base), - &s->memconfig_p4); - memory_region_add_subregion(get_system_memory(), - A7ADDR(base), - &s->memconfig_a7); - s->iobr = 0xfe240000; - memory_region_add_subregion(get_system_memory(), s->iobr, &s->isa); -} - -static void sh_pci_unmap(SysBusDevice *dev, target_phys_addr_t base) -{ - SHPCIState *s = FROM_SYSBUS(SHPCIState, dev); - - memory_region_del_subregion(get_system_memory(), &s->memconfig_p4); - memory_region_del_subregion(get_system_memory(), &s->memconfig_a7); - memory_region_del_subregion(get_system_memory(), &s->isa); -} - static int sh_pci_init_device(SysBusDevice *dev) { SHPCIState *s; @@ -153,9 +130,11 @@ static int sh_pci_init_device(SysBusDevice *dev) memory_region_init_alias(&s->memconfig_a7, "sh_pci.2", &s->memconfig_p4, 0, 0x224); isa_mmio_setup(&s->isa, 0x40000); - sysbus_init_mmio_cb2(dev, sh_pci_map, sh_pci_unmap); + sysbus_init_mmio(dev, &s->memconfig_p4); sysbus_init_mmio(dev, &s->memconfig_a7); - sysbus_init_mmio(dev, &s->isa); + s->iobr = 0xfe240000; + memory_region_add_subregion(get_system_memory(), s->iobr, &s->isa); + s->dev = pci_create_simple(s->bus, PCI_DEVFN(0, 0), "sh_pci_host"); return 0; } |