diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2018-05-15 14:58:43 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2018-05-15 14:58:43 +0100 |
commit | 2752728016bef06e7c9cfb961019272859beeca4 (patch) | |
tree | e39b6eb693d9937eeeb1738f6c9af882f82f6779 | |
parent | 564a0632504fad840491aa9a59453f4e64a316c4 (diff) |
target/arm: Implement FCVT (scalar, fixed-point) for fp16
Cc: qemu-stable@nongnu.org
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20180512003217.9105-5-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | target/arm/translate-a64.c | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 93fb15d185..d0ed125442 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5697,8 +5697,21 @@ static void disas_fp_fixed_conv(DisasContext *s, uint32_t insn) bool sf = extract32(insn, 31, 1); bool itof; - if (sbit || (type > 1) - || (!sf && scale < 32)) { + if (sbit || (!sf && scale < 32)) { + unallocated_encoding(s); + return; + } + + switch (type) { + case 0: /* float32 */ + case 1: /* float64 */ + break; + case 3: /* float16 */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } |