diff options
| author | Peter Maydell <peter.maydell@linaro.org> | 2015-01-08 12:19:46 +0000 |
|---|---|---|
| committer | Riku Voipio <riku.voipio@linaro.org> | 2015-01-27 22:33:57 +0200 |
| commit | b040bc9c0360106fab57bb1abe2d242bd17c4c32 (patch) | |
| tree | f954728288cc45ddf295ad09cb74a3eb81b80f20 | |
| parent | 1af2ee08f9b2f70d31676be14b26026223c9f660 (diff) | |
linux-user/main.c: Call cpu_exec_start/end on all target archs
The start_exclusive() infrastructure is used on all target
architectures, even if only to do the "stop all CPUs before
dumping core" in force_sig(), so be consistent and call
cpu_exec_start/end in the main loop of every target.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Riku Voipio <riku.voipio@linaro.org>
| -rw-r--r-- | linux-user/main.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/linux-user/main.c b/linux-user/main.c index 8c70be4c1b..95e8a519ce 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -283,7 +283,9 @@ void cpu_loop(CPUX86State *env) target_siginfo_t info; for(;;) { + cpu_exec_start(cs); trapnr = cpu_x86_exec(env); + cpu_exec_end(cs); switch(trapnr) { case 0x80: /* linux syscall from int $0x80 */ @@ -1288,7 +1290,9 @@ void cpu_loop (CPUSPARCState *env) target_siginfo_t info; while (1) { + cpu_exec_start(cs); trapnr = cpu_sparc_exec (env); + cpu_exec_end(cs); /* Compute PSR before exposing state. */ if (env->cc_op != CC_OP_FLAGS) { @@ -2656,7 +2660,9 @@ void cpu_loop(CPUOpenRISCState *env) int trapnr, gdbsig; for (;;) { + cpu_exec_start(cs); trapnr = cpu_exec(env); + cpu_exec_end(cs); gdbsig = 0; switch (trapnr) { @@ -2744,7 +2750,9 @@ void cpu_loop(CPUSH4State *env) target_siginfo_t info; while (1) { + cpu_exec_start(cs); trapnr = cpu_sh4_exec (env); + cpu_exec_end(cs); switch (trapnr) { case 0x160: @@ -2804,7 +2812,9 @@ void cpu_loop(CPUCRISState *env) target_siginfo_t info; while (1) { + cpu_exec_start(cs); trapnr = cpu_cris_exec (env); + cpu_exec_end(cs); switch (trapnr) { case 0xaa: { @@ -2863,7 +2873,9 @@ void cpu_loop(CPUMBState *env) target_siginfo_t info; while (1) { + cpu_exec_start(cs); trapnr = cpu_mb_exec (env); + cpu_exec_end(cs); switch (trapnr) { case 0xaa: { @@ -2966,7 +2978,9 @@ void cpu_loop(CPUM68KState *env) TaskState *ts = cs->opaque; for(;;) { + cpu_exec_start(cs); trapnr = cpu_m68k_exec(env); + cpu_exec_end(cs); switch(trapnr) { case EXCP_ILLEGAL: { @@ -3103,7 +3117,9 @@ void cpu_loop(CPUAlphaState *env) abi_long sysret; while (1) { + cpu_exec_start(cs); trapnr = cpu_alpha_exec (env); + cpu_exec_end(cs); /* All of the traps imply a transition through PALcode, which implies an REI instruction has been executed. Which means @@ -3289,7 +3305,9 @@ void cpu_loop(CPUS390XState *env) target_ulong addr; while (1) { + cpu_exec_start(cs); trapnr = cpu_s390x_exec(env); + cpu_exec_end(cs); switch (trapnr) { case EXCP_INTERRUPT: /* Just indicate that signals should be handled asap. */ |