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authorRichard Henderson <richard.henderson@linaro.org>2023-04-07 11:51:49 -0700
committerPeter Maydell <peter.maydell@linaro.org>2023-04-10 14:31:40 +0100
commit8539dc00552e8ea60420856fc1262c8299bc6308 (patch)
treee84b30b9e698972932fa5daff610350e61678f02
parent6a3b1e440bc92ec8274cd1dd2e03c9bf411b2eb8 (diff)
target/arm: Copy guarded bit in combine_cacheattrs
The guarded bit comes from the stage1 walk. Fixes: Coverity CID 1507929 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20230407185149.3253946-3-richard.henderson@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target/arm/ptw.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 58a6de09bc..6d72950a79 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -2576,6 +2576,7 @@ static ARMCacheAttrs combine_cacheattrs(uint64_t hcr,
assert(!s1.is_s2_format);
ret.is_s2_format = false;
+ ret.guarded = s1.guarded;
if (s1.attrs == 0xf0) {
tagged = true;