diff options
| author | Li Zhijian <lizhijian@fujitsu.com> | 2024-01-26 12:01:27 +0000 |
|---|---|---|
| committer | Michael Tokarev <mjt@tls.msk.ru> | 2024-02-14 21:42:04 +0300 |
| commit | bbe51d6ea3a9adcca3b46ce8f19b9b4ead488e28 (patch) | |
| tree | d300944a74757b1e64284741401c3d1d21ecbf00 | |
| parent | bdd3159ad724e4e0aad571b4352b288b8f947ddd (diff) | |
hw/cxl: Pass CXLComponentState to cache_mem_ops
cache_mem_ops.{read,write}() interprets opaque as
CXLComponentState(cxl_cstate) instead of ComponentRegisters(cregs).
Fortunately, cregs is the first member of cxl_cstate, so their values are
the same.
Fixes: 9e58f52d3f8 ("hw/cxl/component: Introduce CXL components (8.1.x, 8.2.5)")
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20240126120132.24248-8-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
(cherry picked from commit 729d45a6af06753d3e330f589c248fe9687c5cd5)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
| -rw-r--r-- | hw/cxl/cxl-component-utils.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c index 29d477492b..9dfde6c0b3 100644 --- a/hw/cxl/cxl-component-utils.c +++ b/hw/cxl/cxl-component-utils.c @@ -199,7 +199,7 @@ void cxl_component_register_block_init(Object *obj, /* io registers controls link which we don't care about in QEMU */ memory_region_init_io(&cregs->io, obj, NULL, cregs, ".io", CXL2_COMPONENT_IO_REGION_SIZE); - memory_region_init_io(&cregs->cache_mem, obj, &cache_mem_ops, cregs, + memory_region_init_io(&cregs->cache_mem, obj, &cache_mem_ops, cxl_cstate, ".cache_mem", CXL2_COMPONENT_CM_REGION_SIZE); memory_region_add_subregion(&cregs->component_registers, 0, &cregs->io); |