diff options
author | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-03-18 18:10:42 +0000 |
---|---|---|
committer | blueswir1 <blueswir1@c046a42c-6fe2-441c-8c8c-71466251a162> | 2008-03-18 18:10:42 +0000 |
commit | 3b89f26c11e4060a203518d8bc203b6fb0b6cf96 (patch) | |
tree | 1d6356549f5aa54d550a6de60cfb32b4f0a06ac7 | |
parent | 2483386a6e77b7e480e8019bd1250694f146bdb1 (diff) |
Convert udiv and sdiv ops to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4088 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r-- | target-sparc/helper.h | 2 | ||||
-rw-r--r-- | target-sparc/op.c | 48 | ||||
-rw-r--r-- | target-sparc/op_helper.c | 44 | ||||
-rw-r--r-- | target-sparc/translate.c | 13 |
4 files changed, 58 insertions, 49 deletions
diff --git a/target-sparc/helper.h b/target-sparc/helper.h index 6ad0f20a77..2fbb7ef53d 100644 --- a/target-sparc/helper.h +++ b/target-sparc/helper.h @@ -36,6 +36,8 @@ void TCG_HELPER_PROTO helper_trapcc(target_ulong nb_trap, target_ulong do_trap); void TCG_HELPER_PROTO helper_debug(void); void TCG_HELPER_PROTO helper_flush(target_ulong addr); +target_ulong TCG_HELPER_PROTO helper_udiv(target_ulong a, target_ulong b); +target_ulong TCG_HELPER_PROTO helper_sdiv(target_ulong a, target_ulong b); uint64_t TCG_HELPER_PROTO helper_pack64(target_ulong high, target_ulong low); uint64_t TCG_HELPER_PROTO helper_ld_asi(target_ulong addr, int asi, int size, int sign); diff --git a/target-sparc/op.c b/target-sparc/op.c index e9e735a9ea..3bd8d484ed 100644 --- a/target-sparc/op.c +++ b/target-sparc/op.c @@ -169,54 +169,6 @@ #include "fop_template.h" #endif -#define FLAG_SET(x) ((env->psr&x)?1:0) - -void OPPROTO op_udiv_T1_T0(void) -{ - uint64_t x0; - uint32_t x1; - - x0 = T0 | ((uint64_t) (env->y) << 32); - x1 = T1; - - if (x1 == 0) { - raise_exception(TT_DIV_ZERO); - } - - x0 = x0 / x1; - if (x0 > 0xffffffff) { - T0 = 0xffffffff; - T1 = 1; - } else { - T0 = x0; - T1 = 0; - } - FORCE_RET(); -} - -void OPPROTO op_sdiv_T1_T0(void) -{ - int64_t x0; - int32_t x1; - - x0 = T0 | ((int64_t) (env->y) << 32); - x1 = T1; - - if (x1 == 0) { - raise_exception(TT_DIV_ZERO); - } - - x0 = x0 / x1; - if ((int32_t) x0 != x0) { - T0 = x0 < 0? 0x80000000: 0x7fffffff; - T1 = 1; - } else { - T0 = x0; - T1 = 0; - } - FORCE_RET(); -} - /* Load and store */ #define MEMSUFFIX _raw #include "op_mem.h" diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c index b47e50e52e..e35169d823 100644 --- a/target-sparc/op_helper.c +++ b/target-sparc/op_helper.c @@ -1582,6 +1582,50 @@ void helper_rett(void) } #endif +target_ulong helper_udiv(target_ulong a, target_ulong b) +{ + uint64_t x0; + uint32_t x1; + + x0 = a | ((uint64_t) (env->y) << 32); + x1 = b; + + if (x1 == 0) { + raise_exception(TT_DIV_ZERO); + } + + x0 = x0 / x1; + if (x0 > 0xffffffff) { + env->cc_src2 = 1; + return 0xffffffff; + } else { + env->cc_src2 = 0; + return x0; + } +} + +target_ulong helper_sdiv(target_ulong a, target_ulong b) +{ + int64_t x0; + int32_t x1; + + x0 = a | ((int64_t) (env->y) << 32); + x1 = b; + + if (x1 == 0) { + raise_exception(TT_DIV_ZERO); + } + + x0 = x0 / x1; + if ((int32_t) x0 != x0) { + env->cc_src2 = 1; + return x0 < 0? 0x80000000: 0x7fffffff; + } else { + env->cc_src2 = 0; + return x0; + } +} + uint64_t helper_pack64(target_ulong high, target_ulong low) { return ((uint64_t)high << 32) | (uint64_t)(low & 0xffffffff); diff --git a/target-sparc/translate.c b/target-sparc/translate.c index 5d87ef8d5d..1ab4d7e956 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -807,6 +807,16 @@ static inline void gen_op_smul_T1_T0(void) tcg_gen_discard_i64(r_temp2); } +static inline void gen_op_udiv_T1_T0(void) +{ + tcg_gen_helper_1_2(helper_udiv, cpu_T[0], cpu_T[0], cpu_T[1]); +} + +static inline void gen_op_sdiv_T1_T0(void) +{ + tcg_gen_helper_1_2(helper_sdiv, cpu_T[0], cpu_T[0], cpu_T[1]); +} + #ifdef TARGET_SPARC64 static inline void gen_trap_ifdivzero_i64(TCGv divisor) { @@ -842,7 +852,8 @@ static inline void gen_op_div_cc(void) gen_cc_clear(); gen_cc_NZ(cpu_T[0]); l1 = gen_new_label(); - tcg_gen_brcond_i32(TCG_COND_EQ, cpu_T[1], tcg_const_i32(0), l1); + tcg_gen_ld_tl(cpu_tmp0, cpu_env, offsetof(CPUSPARCState, cc_src2)); + tcg_gen_brcond_tl(TCG_COND_EQ, cpu_tmp0, tcg_const_tl(0), l1); tcg_gen_ori_i32(cpu_psr, cpu_psr, PSR_OVF); gen_set_label(l1); } |