diff options
| author | Eduardo Habkost <ehabkost@redhat.com> | 2015-11-28 14:32:26 -0200 |
|---|---|---|
| committer | Eduardo Habkost <ehabkost@redhat.com> | 2016-05-23 13:19:36 -0300 |
| commit | ee1b09f695dcd8532f470e53297473bd3bc88718 (patch) | |
| tree | 7ca643b8925986de7f4ae50d52b486c772ff0564 | |
| parent | b503717d28e8f7eff39bf38624e6cf42687d951a (diff) | |
target-i386: Use xsave structs for ext_save_area
This doesn't introduce any change in the code, as the offsets and
struct sizes match what was present in the table. This can be
validated by the QEMU_BUILD_BUG_ON lines on target-i386/cpu.h,
which ensures the struct sizes and offsets match the existing
values in ext_save_area.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
| -rw-r--r-- | target-i386/cpu.c | 21 |
1 files changed, 14 insertions, 7 deletions
diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 05bf5ed2f0..e9ef39b634 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -474,25 +474,32 @@ static const X86RegisterInfo32 x86_reg_info_32[CPU_NB_REGS32] = { const ExtSaveArea x86_ext_save_areas[] = { [XSTATE_YMM_BIT] = { .feature = FEAT_1_ECX, .bits = CPUID_EXT_AVX, - .offset = 0x240, .size = 0x100 }, + .offset = offsetof(X86XSaveArea, avx_state), + .size = sizeof(XSaveAVX) }, [XSTATE_BNDREGS_BIT] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX, - .offset = 0x3c0, .size = 0x40 }, + .offset = offsetof(X86XSaveArea, bndreg_state), + .size = sizeof(XSaveBNDREG) }, [XSTATE_BNDCSR_BIT] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_MPX, - .offset = 0x400, .size = 0x40 }, + .offset = offsetof(X86XSaveArea, bndcsr_state), + .size = sizeof(XSaveBNDCSR) }, [XSTATE_OPMASK_BIT] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F, - .offset = 0x440, .size = 0x40 }, + .offset = offsetof(X86XSaveArea, opmask_state), + .size = sizeof(XSaveOpmask) }, [XSTATE_ZMM_Hi256_BIT] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F, - .offset = 0x480, .size = 0x200 }, + .offset = offsetof(X86XSaveArea, zmm_hi256_state), + .size = sizeof(XSaveZMM_Hi256) }, [XSTATE_Hi16_ZMM_BIT] = { .feature = FEAT_7_0_EBX, .bits = CPUID_7_0_EBX_AVX512F, - .offset = 0x680, .size = 0x400 }, + .offset = offsetof(X86XSaveArea, hi16_zmm_state), + .size = sizeof(XSaveHi16_ZMM) }, [XSTATE_PKRU_BIT] = { .feature = FEAT_7_0_ECX, .bits = CPUID_7_0_ECX_PKU, - .offset = 0xA80, .size = 0x8 }, + .offset = offsetof(X86XSaveArea, pkru_state), + .size = sizeof(XSavePKRU) }, }; const char *get_register_name_32(unsigned int reg) |