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authorJeff Kubascik <jeff.kubascik@dornerworks.com>2020-01-17 14:09:31 +0000
committerMichael Roth <mdroth@linux.vnet.ibm.com>2020-06-22 12:45:24 -0500
commitf3ef98874e2b8ea5656cd7026eaf4e150b228426 (patch)
tree890ece0632f1c8aef26862ec6cd07e438a72e406
parente8a286010c4dc5f3965c80d5c66e71bc69e762bf (diff)
target/arm: Return correct IL bit in merge_syn_data_abort
The IL bit is set for 32-bit instructions, thus passing false with the is_16bit parameter to syn_data_abort_with_iss() makes a syn mask that always has the IL bit set. Pass is_16bit as true to make the initial syn mask have IL=0, so that the final IL value comes from or'ing template_syn. Cc: qemu-stable@nongnu.org Fixes: aaa1f954d4ca ("target-arm: A64: Create Instruction Syndromes for Data Aborts") Signed-off-by: Jeff Kubascik <jeff.kubascik@dornerworks.com> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20200117004618.2742-2-richard.henderson@linaro.org [rth: Extracted this as a self-contained bug fix from a larger patch] Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> (cherry picked from commit 30d544839e278dc76017b9a42990c41e84a34377) Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com>
-rw-r--r--target/arm/tlb_helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/arm/tlb_helper.c b/target/arm/tlb_helper.c
index 5feb312941..e63f8bda29 100644
--- a/target/arm/tlb_helper.c
+++ b/target/arm/tlb_helper.c
@@ -44,7 +44,7 @@ static inline uint32_t merge_syn_data_abort(uint32_t template_syn,
syn = syn_data_abort_with_iss(same_el,
0, 0, 0, 0, 0,
ea, 0, s1ptw, is_write, fsc,
- false);
+ true);
/* Merge the runtime syndrome with the template syndrome. */
syn |= template_syn;
}