diff options
author | Peter Maydell <peter.maydell@linaro.org> | 2017-04-24 09:43:03 +0100 |
---|---|---|
committer | Peter Maydell <peter.maydell@linaro.org> | 2017-04-24 09:43:03 +0100 |
commit | cd1ea50895faea4d274183bae0d3903523e049fc (patch) | |
tree | 446ecea259817797fbec2fafaa3064db35cf672c | |
parent | 32c7e0ab755745e961f1772e95cac381cc68769d (diff) | |
parent | 749763864208b14f100f1f8319aeb931134430fa (diff) |
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-signed' into staging
qemu-sparc update
# gpg: Signature made Fri 21 Apr 2017 20:09:35 BST
# gpg: using RSA key 0x5BC2C56FAE0F321F
# gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>"
# Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* remotes/mcayland/tags/qemu-sparc-signed:
tcx: switch to load_image_mr() and remove prom_addr hack
tcx: use tcx_set_dirty() for accelerated ops
tcx: remove primitives for non-32-bit surfaces
tcx: remove TARGET_PAGE_SIZE from tcx24_update_display()
tcx: remove TARGET_PAGE_SIZE from tcx_update_display()
tcx: remove page24 and cpage from tcx24_update_display()
tcx: alter tcx24_reset_dirty() to accept address and length parameters
tcx: alter tcx24_check_dirty() to accept address and length parameters
tcx: ensure tcx_set_dirty() also invalidates the 24-bit plane and cplane
tcx: alter tcx_set_dirty() to accept address and length parameters
cg3: switch to load_image_mr() and remove prom-addr hack
cg3: fix up size parameter for memory_region_get_dirty()
cg3: remove TARGET_PAGE_SIZE rounding on dirty page detection
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r-- | hw/display/cg3.c | 12 | ||||
-rw-r--r-- | hw/display/tcx.c | 298 | ||||
-rw-r--r-- | hw/sparc/sun4m.c | 2 |
3 files changed, 65 insertions, 247 deletions
diff --git a/hw/display/cg3.c b/hw/display/cg3.c index 1174220394..03d9197f71 100644 --- a/hw/display/cg3.c +++ b/hw/display/cg3.c @@ -26,7 +26,6 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu-common.h" -#include "cpu.h" #include "qemu/error-report.h" #include "ui/console.h" #include "hw/sysbus.h" @@ -114,8 +113,8 @@ static void cg3_update_display(void *opaque) for (y = 0; y < height; y++) { int update = s->full_update; - page = (y * width) & TARGET_PAGE_MASK; - update |= memory_region_get_dirty(&s->vram_mem, page, page + width, + page = y * width; + update |= memory_region_get_dirty(&s->vram_mem, page, width, DIRTY_MEMORY_VGA); if (update) { if (y_start < 0) { @@ -148,8 +147,7 @@ static void cg3_update_display(void *opaque) } if (page_max >= page_min) { memory_region_reset_dirty(&s->vram_mem, - page_min, page_max - page_min + TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA); + page_min, page_max - page_min, DIRTY_MEMORY_VGA); } /* vsync interrupt? */ if (s->regs[0] & CG3_CR_ENABLE_INTS) { @@ -305,8 +303,7 @@ static void cg3_realizefn(DeviceState *dev, Error **errp) vmstate_register_ram_global(&s->rom); fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, CG3_ROM_FILE); if (fcode_filename) { - ret = load_image_targphys(fcode_filename, s->prom_addr, - FCODE_MAX_ROM_SIZE); + ret = load_image_mr(fcode_filename, &s->rom); g_free(fcode_filename); if (ret < 0 || ret > FCODE_MAX_ROM_SIZE) { error_report("cg3: could not load prom '%s'", CG3_ROM_FILE); @@ -371,7 +368,6 @@ static Property cg3_properties[] = { DEFINE_PROP_UINT16("width", CG3State, width, -1), DEFINE_PROP_UINT16("height", CG3State, height, -1), DEFINE_PROP_UINT16("depth", CG3State, depth, -1), - DEFINE_PROP_UINT64("prom-addr", CG3State, prom_addr, -1), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/display/tcx.c b/hw/display/tcx.c index 8e26aae801..5a1115cc65 100644 --- a/hw/display/tcx.c +++ b/hw/display/tcx.c @@ -25,7 +25,6 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu-common.h" -#include "cpu.h" /* FIXME shouldn't use TARGET_PAGE_SIZE */ #include "ui/console.h" #include "ui/pixel_ops.h" #include "hw/loader.h" @@ -93,41 +92,46 @@ typedef struct TCXState { uint16_t cursy; } TCXState; -static void tcx_set_dirty(TCXState *s) +static void tcx_set_dirty(TCXState *s, ram_addr_t addr, int len) { - memory_region_set_dirty(&s->vram_mem, 0, MAXX * MAXY); + memory_region_set_dirty(&s->vram_mem, addr, len); + + if (s->depth == 24) { + memory_region_set_dirty(&s->vram_mem, s->vram24_offset + addr * 4, + len * 4); + memory_region_set_dirty(&s->vram_mem, s->cplane_offset + addr * 4, + len * 4); + } } -static inline int tcx24_check_dirty(TCXState *s, ram_addr_t page, - ram_addr_t page24, ram_addr_t cpage) +static int tcx_check_dirty(TCXState *s, ram_addr_t addr, int len) { int ret; - ret = memory_region_get_dirty(&s->vram_mem, page, TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA); - ret |= memory_region_get_dirty(&s->vram_mem, page24, TARGET_PAGE_SIZE * 4, - DIRTY_MEMORY_VGA); - ret |= memory_region_get_dirty(&s->vram_mem, cpage, TARGET_PAGE_SIZE * 4, - DIRTY_MEMORY_VGA); + ret = memory_region_get_dirty(&s->vram_mem, addr, len, DIRTY_MEMORY_VGA); + + if (s->depth == 24) { + ret |= memory_region_get_dirty(&s->vram_mem, + s->vram24_offset + addr * 4, len * 4, + DIRTY_MEMORY_VGA); + ret |= memory_region_get_dirty(&s->vram_mem, + s->cplane_offset + addr * 4, len * 4, + DIRTY_MEMORY_VGA); + } + return ret; } -static inline void tcx24_reset_dirty(TCXState *ts, ram_addr_t page_min, - ram_addr_t page_max, ram_addr_t page24, - ram_addr_t cpage) +static void tcx_reset_dirty(TCXState *s, ram_addr_t addr, int len) { - memory_region_reset_dirty(&ts->vram_mem, - page_min, - (page_max - page_min) + TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA); - memory_region_reset_dirty(&ts->vram_mem, - page24 + page_min * 4, - (page_max - page_min) * 4 + TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA); - memory_region_reset_dirty(&ts->vram_mem, - cpage + page_min * 4, - (page_max - page_min) * 4 + TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA); + memory_region_reset_dirty(&s->vram_mem, addr, len, DIRTY_MEMORY_VGA); + + if (s->depth == 24) { + memory_region_reset_dirty(&s->vram_mem, s->vram24_offset + addr * 4, + len * 4, DIRTY_MEMORY_VGA); + memory_region_reset_dirty(&s->vram_mem, s->cplane_offset + addr * 4, + len * 4, DIRTY_MEMORY_VGA); + } } static void update_palette_entries(TCXState *s, int start, int end) @@ -136,27 +140,14 @@ static void update_palette_entries(TCXState *s, int start, int end) int i; for (i = start; i < end; i++) { - switch (surface_bits_per_pixel(surface)) { - default: - case 8: - s->palette[i] = rgb_to_pixel8(s->r[i], s->g[i], s->b[i]); - break; - case 15: - s->palette[i] = rgb_to_pixel15(s->r[i], s->g[i], s->b[i]); - break; - case 16: - s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]); - break; - case 32: - if (is_surface_bgr(surface)) { - s->palette[i] = rgb_to_pixel32bgr(s->r[i], s->g[i], s->b[i]); - } else { - s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]); - } - break; + if (is_surface_bgr(surface)) { + s->palette[i] = rgb_to_pixel32bgr(s->r[i], s->g[i], s->b[i]); + } else { + s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]); } + break; } - tcx_set_dirty(s); + tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); } static void tcx_draw_line32(TCXState *s1, uint8_t *d, @@ -172,31 +163,6 @@ static void tcx_draw_line32(TCXState *s1, uint8_t *d, } } -static void tcx_draw_line16(TCXState *s1, uint8_t *d, - const uint8_t *s, int width) -{ - int x; - uint8_t val; - uint16_t *p = (uint16_t *)d; - - for (x = 0; x < width; x++) { - val = *s++; - *p++ = s1->palette[val]; - } -} - -static void tcx_draw_line8(TCXState *s1, uint8_t *d, - const uint8_t *s, int width) -{ - int x; - uint8_t val; - - for(x = 0; x < width; x++) { - val = *s++; - *d++ = s1->palette[val]; - } -} - static void tcx_draw_cursor32(TCXState *s1, uint8_t *d, int y, int width) { @@ -223,57 +189,6 @@ static void tcx_draw_cursor32(TCXState *s1, uint8_t *d, } } -static void tcx_draw_cursor16(TCXState *s1, uint8_t *d, - int y, int width) -{ - int x, len; - uint32_t mask, bits; - uint16_t *p = (uint16_t *)d; - - y = y - s1->cursy; - mask = s1->cursmask[y]; - bits = s1->cursbits[y]; - len = MIN(width - s1->cursx, 32); - p = &p[s1->cursx]; - for (x = 0; x < len; x++) { - if (mask & 0x80000000) { - if (bits & 0x80000000) { - *p = s1->palette[259]; - } else { - *p = s1->palette[258]; - } - } - p++; - mask <<= 1; - bits <<= 1; - } -} - -static void tcx_draw_cursor8(TCXState *s1, uint8_t *d, - int y, int width) -{ - int x, len; - uint32_t mask, bits; - - y = y - s1->cursy; - mask = s1->cursmask[y]; - bits = s1->cursbits[y]; - len = MIN(width - s1->cursx, 32); - d = &d[s1->cursx]; - for (x = 0; x < len; x++) { - if (mask & 0x80000000) { - if (bits & 0x80000000) { - *d = s1->palette[259]; - } else { - *d = s1->palette[258]; - } - } - d++; - mask <<= 1; - bits <<= 1; - } -} - /* XXX Could be much more optimal: * detect if line/page/whole screen is in 24 bit mode @@ -322,10 +237,8 @@ static void tcx_update_display(void *opaque) ram_addr_t page, page_min, page_max; int y, y_start, dd, ds; uint8_t *d, *s; - void (*f)(TCXState *s1, uint8_t *dst, const uint8_t *src, int width); - void (*fc)(TCXState *s1, uint8_t *dst, int y, int width); - if (surface_bits_per_pixel(surface) == 0) { + if (surface_bits_per_pixel(surface) != 32) { return; } @@ -338,29 +251,9 @@ static void tcx_update_display(void *opaque) dd = surface_stride(surface); ds = 1024; - switch (surface_bits_per_pixel(surface)) { - case 32: - f = tcx_draw_line32; - fc = tcx_draw_cursor32; - break; - case 15: - case 16: - f = tcx_draw_line16; - fc = tcx_draw_cursor16; - break; - default: - case 8: - f = tcx_draw_line8; - fc = tcx_draw_cursor8; - break; - case 0: - return; - } - memory_region_sync_dirty_bitmap(&ts->vram_mem); - for (y = 0; y < ts->height; page += TARGET_PAGE_SIZE) { - if (memory_region_get_dirty(&ts->vram_mem, page, TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA)) { + for (y = 0; y < ts->height; y++, page += ds) { + if (tcx_check_dirty(ts, page, ds)) { if (y_start < 0) y_start = y; if (page < page_min) @@ -368,37 +261,10 @@ static void tcx_update_display(void *opaque) if (page > page_max) page_max = page; - f(ts, d, s, ts->width); - if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) { - fc(ts, d, y, ts->width); - } - d += dd; - s += ds; - y++; - - f(ts, d, s, ts->width); - if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) { - fc(ts, d, y, ts->width); - } - d += dd; - s += ds; - y++; - - f(ts, d, s, ts->width); - if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) { - fc(ts, d, y, ts->width); - } - d += dd; - s += ds; - y++; - - f(ts, d, s, ts->width); + tcx_draw_line32(ts, d, s, ts->width); if (y >= ts->cursy && y < ts->cursy + 32 && ts->cursx < ts->width) { - fc(ts, d, y, ts->width); + tcx_draw_cursor32(ts, d, y, ts->width); } - d += dd; - s += ds; - y++; } else { if (y_start >= 0) { /* flush to display */ @@ -406,10 +272,9 @@ static void tcx_update_display(void *opaque) ts->width, y - y_start); y_start = -1; } - d += dd * 4; - s += ds * 4; - y += 4; } + s += ds; + d += dd; } if (y_start >= 0) { /* flush to display */ @@ -418,10 +283,7 @@ static void tcx_update_display(void *opaque) } /* reset modified pages */ if (page_max >= page_min) { - memory_region_reset_dirty(&ts->vram_mem, - page_min, - (page_max - page_min) + TARGET_PAGE_SIZE, - DIRTY_MEMORY_VGA); + tcx_reset_dirty(ts, page_min, page_max - page_min); } } @@ -429,7 +291,7 @@ static void tcx24_update_display(void *opaque) { TCXState *ts = opaque; DisplaySurface *surface = qemu_console_surface(ts->con); - ram_addr_t page, page_min, page_max, cpage, page24; + ram_addr_t page, page_min, page_max; int y, y_start, dd, ds; uint8_t *d, *s; uint32_t *cptr, *s24; @@ -439,8 +301,6 @@ static void tcx24_update_display(void *opaque) } page = 0; - page24 = ts->vram24_offset; - cpage = ts->cplane_offset; y_start = -1; page_min = -1; page_max = 0; @@ -452,9 +312,8 @@ static void tcx24_update_display(void *opaque) ds = 1024; memory_region_sync_dirty_bitmap(&ts->vram_mem); - for (y = 0; y < ts->height; page += TARGET_PAGE_SIZE, - page24 += TARGET_PAGE_SIZE, cpage += TARGET_PAGE_SIZE) { - if (tcx24_check_dirty(ts, page, page24, cpage)) { + for (y = 0; y < ts->height; y++, page += ds) { + if (tcx_check_dirty(ts, page, ds)) { if (y_start < 0) y_start = y; if (page < page_min) @@ -465,38 +324,6 @@ static void tcx24_update_display(void *opaque) if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) { tcx_draw_cursor32(ts, d, y, ts->width); } - d += dd; - s += ds; - cptr += ds; - s24 += ds; - y++; - tcx24_draw_line32(ts, d, s, ts->width, cptr, s24); - if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) { - tcx_draw_cursor32(ts, d, y, ts->width); - } - d += dd; - s += ds; - cptr += ds; - s24 += ds; - y++; - tcx24_draw_line32(ts, d, s, ts->width, cptr, s24); - if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) { - tcx_draw_cursor32(ts, d, y, ts->width); - } - d += dd; - s += ds; - cptr += ds; - s24 += ds; - y++; - tcx24_draw_line32(ts, d, s, ts->width, cptr, s24); - if (y >= ts->cursy && y < ts->cursy+32 && ts->cursx < ts->width) { - tcx_draw_cursor32(ts, d, y, ts->width); - } - d += dd; - s += ds; - cptr += ds; - s24 += ds; - y++; } else { if (y_start >= 0) { /* flush to display */ @@ -504,12 +331,11 @@ static void tcx24_update_display(void *opaque) ts->width, y - y_start); y_start = -1; } - d += dd * 4; - s += ds * 4; - cptr += ds * 4; - s24 += ds * 4; - y += 4; } + d += dd; + s += ds; + cptr += ds; + s24 += ds; } if (y_start >= 0) { /* flush to display */ @@ -518,7 +344,7 @@ static void tcx24_update_display(void *opaque) } /* reset modified pages */ if (page_max >= page_min) { - tcx24_reset_dirty(ts, page_min, page_max, page24, cpage); + tcx_reset_dirty(ts, page_min, page_max - page_min); } } @@ -526,7 +352,7 @@ static void tcx_invalidate_display(void *opaque) { TCXState *s = opaque; - tcx_set_dirty(s); + tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); qemu_console_resize(s->con, s->width, s->height); } @@ -534,7 +360,7 @@ static void tcx24_invalidate_display(void *opaque) { TCXState *s = opaque; - tcx_set_dirty(s); + tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); qemu_console_resize(s->con, s->width, s->height); } @@ -543,7 +369,7 @@ static int vmstate_tcx_post_load(void *opaque, int version_id) TCXState *s = opaque; update_palette_entries(s, 0, 256); - tcx_set_dirty(s); + tcx_set_dirty(s, 0, memory_region_size(&s->vram_mem)); return 0; } @@ -699,7 +525,7 @@ static void tcx_stip_writel(void *opaque, hwaddr addr, val <<= 1; } } - memory_region_set_dirty(&s->vram_mem, addr, 32); + tcx_set_dirty(s, addr, 32); } } @@ -732,7 +558,7 @@ static void tcx_rstip_writel(void *opaque, hwaddr addr, val <<= 1; } } - memory_region_set_dirty(&s->vram_mem, addr, 32); + tcx_set_dirty(s, addr, 32); } } @@ -790,7 +616,7 @@ static void tcx_blit_writel(void *opaque, hwaddr addr, memcpy(&s->vram24[addr], &s->vram24[adsr], len * 4); } } - memory_region_set_dirty(&s->vram_mem, addr, len); + tcx_set_dirty(s, addr, len); } } @@ -824,7 +650,7 @@ static void tcx_rblit_writel(void *opaque, hwaddr addr, memcpy(&s->cplane[addr], &s->cplane[adsr], len * 4); } } - memory_region_set_dirty(&s->vram_mem, addr, len); + tcx_set_dirty(s, addr, len); } } @@ -861,7 +687,7 @@ static void tcx_invalidate_cursor_position(TCXState *s) start = ymin * 1024; end = ymax * 1024; - memory_region_set_dirty(&s->vram_mem, start, end-start); + tcx_set_dirty(s, start, end - start); } static uint64_t tcx_thc_readl(void *opaque, hwaddr addr, @@ -1017,8 +843,7 @@ static void tcx_realizefn(DeviceState *dev, Error **errp) vmstate_register_ram_global(&s->rom); fcode_filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, TCX_ROM_FILE); if (fcode_filename) { - ret = load_image_targphys(fcode_filename, s->prom_addr, - FCODE_MAX_ROM_SIZE); + ret = load_image_mr(fcode_filename, &s->rom); g_free(fcode_filename); if (ret < 0 || ret > FCODE_MAX_ROM_SIZE) { error_report("tcx: could not load prom '%s'", TCX_ROM_FILE); @@ -1076,7 +901,6 @@ static Property tcx_properties[] = { DEFINE_PROP_UINT16("width", TCXState, width, -1), DEFINE_PROP_UINT16("height", TCXState, height, -1), DEFINE_PROP_UINT16("depth", TCXState, depth, -1), - DEFINE_PROP_UINT64("prom_addr", TCXState, prom_addr, -1), DEFINE_PROP_END_OF_LIST(), }; diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 873cd7df9a..5f022cc08d 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -491,7 +491,6 @@ static void tcx_init(hwaddr addr, qemu_irq irq, int vram_size, int width, qdev_prop_set_uint16(dev, "width", width); qdev_prop_set_uint16(dev, "height", height); qdev_prop_set_uint16(dev, "depth", depth); - qdev_prop_set_uint64(dev, "prom_addr", addr); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); @@ -544,7 +543,6 @@ static void cg3_init(hwaddr addr, qemu_irq irq, int vram_size, int width, qdev_prop_set_uint16(dev, "width", width); qdev_prop_set_uint16(dev, "height", height); qdev_prop_set_uint16(dev, "depth", depth); - qdev_prop_set_uint64(dev, "prom-addr", addr); qdev_init_nofail(dev); s = SYS_BUS_DEVICE(dev); |