diff options
author | Pranith Kumar <bobby.prani@gmail.com> | 2017-07-12 17:51:42 -0400 |
---|---|---|
committer | Paolo Bonzini <pbonzini@redhat.com> | 2017-07-14 11:05:19 +0200 |
commit | 406bc339b0505fcfc2ffcbca1f05a3756e338a65 (patch) | |
tree | b5e1443080dc8ac7f6ea78d58ed3d6082af12fe5 | |
parent | 04bf2526ce87f21b32c9acba1c5518708c243ad0 (diff) |
Revert "exec.c: Fix breakpoint invalidation race"
Now that we have proper locking after MTTCG patches have landed, we
can revert the commit. This reverts commit
a9353fe897ca2687e5b3385ed39e3db3927a90e0.
CC: Peter Maydell <peter.maydell@linaro.org>
CC: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Pranith Kumar <bobby.prani@gmail.com>
Message-Id: <20170712215143.19594-1-bobby.prani@gmail.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r-- | exec.c | 25 | ||||
-rw-r--r-- | include/exec/exec-all.h | 3 |
2 files changed, 22 insertions, 6 deletions
@@ -775,15 +775,28 @@ void cpu_exec_realizefn(CPUState *cpu, Error **errp) #endif } +#if defined(CONFIG_USER_ONLY) static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) { - /* Flush the whole TB as this will not have race conditions - * even if we don't have proper locking yet. - * Ideally we would just invalidate the TBs for the - * specified PC. - */ - tb_flush(cpu); + mmap_lock(); + tb_lock(); + tb_invalidate_phys_page_range(pc, pc + 1, 0); + tb_unlock(); + mmap_unlock(); } +#else +static void breakpoint_invalidate(CPUState *cpu, target_ulong pc) +{ + MemTxAttrs attrs; + hwaddr phys = cpu_get_phys_page_attrs_debug(cpu, pc, &attrs); + int asidx = cpu_asidx_from_attrs(cpu, attrs); + if (phys != -1) { + /* Locks grabbed by tb_invalidate_phys_addr */ + tb_invalidate_phys_addr(cpu->cpu_ases[asidx].as, + phys | (pc & ~TARGET_PAGE_MASK)); + } +} +#endif #if defined(CONFIG_USER_ONLY) void cpu_watchpoint_remove_all(CPUState *cpu, int mask) diff --git a/include/exec/exec-all.h b/include/exec/exec-all.h index 8096d64a1d..bf8da2aa5a 100644 --- a/include/exec/exec-all.h +++ b/include/exec/exec-all.h @@ -290,6 +290,9 @@ static inline void tlb_flush_by_mmuidx_all_cpus_synced(CPUState *cpu, uint16_t idxmap) { } +static inline void tb_invalidate_phys_addr(AddressSpace *as, hwaddr addr) +{ +} #endif #define CODE_GEN_ALIGN 16 /* must be >= of the size of a icache line */ |