diff options
| author | Petar Jovanovic <petarj@mips.com> | 2013-01-23 03:57:02 +0100 |
|---|---|---|
| committer | Aurelien Jarno <aurelien@aurel32.net> | 2013-01-31 23:42:03 +0100 |
| commit | 6f0af30449b4780c65723d0d45d0f956af5e8c4e (patch) | |
| tree | 069ecf9b82cf6b8cf023f1dca5cbf9103239d52b | |
| parent | f54c35d1ea287beb26f6e929e2362cbc9dcfec07 (diff) | |
target-mips: enable access to DSP ASE if implemented
compute_hflags() will reset DSP h-flags, so MX bit should be initially set
for usermode in cpu_state_reset() if DSP ASE is implemented.
This change will bring back user-mode support for DSP ASE, since one of the
recent changes broke it.
Signed-off-by: Petar Jovanovic <petarj@mips.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
| -rw-r--r-- | target-mips/translate.c | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index e58d916b04..3b77b53b93 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -15978,10 +15978,8 @@ void cpu_state_reset(CPUMIPSState *env) if (env->CP0_Config1 & (1 << CP0C1_FP)) { env->CP0_Status |= (1 << CP0St_CU1); } - if (env->cpu_model->insn_flags & ASE_DSPR2) { - env->hflags |= MIPS_HFLAG_DSP | MIPS_HFLAG_DSPR2; - } else if (env->cpu_model->insn_flags & ASE_DSP) { - env->hflags |= MIPS_HFLAG_DSP; + if (env->CP0_Config3 & (1 << CP0C3_DSPP)) { + env->CP0_Status |= (1 << CP0St_MX); } #else if (env->hflags & MIPS_HFLAG_BMASK) { |