diff options
author | Max Filippov <jcmvbkbc@gmail.com> | 2012-01-13 10:10:49 +0400 |
---|---|---|
committer | Max Filippov <jcmvbkbc@gmail.com> | 2012-02-20 20:07:12 +0400 |
commit | 18da9326412874983c06f8d1689543c45e693873 (patch) | |
tree | 3532288f5a6935d3537f8cbc0aae3094e13f3ba1 | |
parent | f14c4b5fb1e2509ad738afe491c099a84ca80749 (diff) |
target-xtensa: add DEBUG_SECTION to overlay tool
Fill debug configuration from overlay definitions in the DEBUG_SECTION.
Add DEBUG_SECTION to DC232B and FSF cores.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
-rw-r--r-- | target-xtensa/core-dc232b.c | 1 | ||||
-rw-r--r-- | target-xtensa/core-fsf.c | 1 | ||||
-rw-r--r-- | target-xtensa/overlay_tool.h | 5 |
3 files changed, 7 insertions, 0 deletions
diff --git a/target-xtensa/core-dc232b.c b/target-xtensa/core-dc232b.c index 4d9bd559d4..b723c4ca7b 100644 --- a/target-xtensa/core-dc232b.c +++ b/target-xtensa/core-dc232b.c @@ -22,6 +22,7 @@ static const XtensaConfig dc232b = { EXCEPTIONS_SECTION, INTERRUPTS_SECTION, TLB_SECTION, + DEBUG_SECTION, .clock_freq_khz = 10000, }; diff --git a/target-xtensa/core-fsf.c b/target-xtensa/core-fsf.c index 7650462f2f..88de4dd4ba 100644 --- a/target-xtensa/core-fsf.c +++ b/target-xtensa/core-fsf.c @@ -16,6 +16,7 @@ static const XtensaConfig fsf = { EXCEPTIONS_SECTION, INTERRUPTS_SECTION, TLB_SECTION, + DEBUG_SECTION, .clock_freq_khz = 10000, }; diff --git a/target-xtensa/overlay_tool.h b/target-xtensa/overlay_tool.h index e7c4c3a181..a3a5650fb0 100644 --- a/target-xtensa/overlay_tool.h +++ b/target-xtensa/overlay_tool.h @@ -114,6 +114,7 @@ [EXC_KERNEL] = XCHAL_KERNEL_VECTOR_VADDR, \ [EXC_USER] = XCHAL_USER_VECTOR_VADDR, \ [EXC_DOUBLE] = XCHAL_DOUBLEEXC_VECTOR_VADDR, \ + [EXC_DEBUG] = XCHAL_DEBUG_VECTOR_VADDR, \ } #define INTERRUPT_VECTORS { \ @@ -302,6 +303,10 @@ #define REGISTER_CORE(core) #endif +#define DEBUG_SECTION \ + .debug_level = XCHAL_DEBUGLEVEL, \ + .nibreak = XCHAL_NUM_IBREAK, \ + .ndbreak = XCHAL_NUM_DBREAK #if XCHAL_NUM_INTLEVELS + XCHAL_HAVE_NMI + 1 <= 2 #define XCHAL_INTLEVEL2_VECTOR_VADDR 0 |