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authorJean-Christophe Dubois <jcd@tribudubois.net>2023-08-31 09:45:16 +0100
committerPeter Maydell <peter.maydell@linaro.org>2023-08-31 09:45:16 +0100
commitf6020845e20d1cc033770bbff8c1d92855d2bba5 (patch)
tree4e17fda72c4f80ec6e0ec296a4dd4c11a2104d6c
parent0cd4926b855c491c88facaa0abeaf910f7d6ff01 (diff)
Add i.MX6UL missing devices.
* Add TZASC as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add CSU as unimplemented device. - Allow bare metal application to access this (unimplemented) device * Add 4 missing PWM devices Signed-off-by: Jean-Christophe Dubois <jcd@tribudubois.net> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 59e4dc56e14eccfefd379275ec19048dff9c10b3.1692964892.git.jcd@tribudubois.net Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--hw/arm/fsl-imx6ul.c16
-rw-r--r--include/hw/arm/fsl-imx6ul.h2
2 files changed, 17 insertions, 1 deletions
diff --git a/hw/arm/fsl-imx6ul.c b/hw/arm/fsl-imx6ul.c
index 06a32aff64..e37b69a5e1 100644
--- a/hw/arm/fsl-imx6ul.c
+++ b/hw/arm/fsl-imx6ul.c
@@ -583,6 +583,10 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_PWM2_ADDR,
FSL_IMX6UL_PWM3_ADDR,
FSL_IMX6UL_PWM4_ADDR,
+ FSL_IMX6UL_PWM5_ADDR,
+ FSL_IMX6UL_PWM6_ADDR,
+ FSL_IMX6UL_PWM7_ADDR,
+ FSL_IMX6UL_PWM8_ADDR,
};
snprintf(name, NAME_SIZE, "pwm%d", i);
@@ -637,6 +641,18 @@ static void fsl_imx6ul_realize(DeviceState *dev, Error **errp)
FSL_IMX6UL_LCDIF_SIZE);
/*
+ * CSU
+ */
+ create_unimplemented_device("csu", FSL_IMX6UL_CSU_ADDR,
+ FSL_IMX6UL_CSU_SIZE);
+
+ /*
+ * TZASC
+ */
+ create_unimplemented_device("tzasc", FSL_IMX6UL_TZASC_ADDR,
+ FSL_IMX6UL_TZASC_SIZE);
+
+ /*
* ROM memory
*/
memory_region_init_rom(&s->rom, OBJECT(dev), "imx6ul.rom",
diff --git a/include/hw/arm/fsl-imx6ul.h b/include/hw/arm/fsl-imx6ul.h
index f7bf684b42..63012628ff 100644
--- a/include/hw/arm/fsl-imx6ul.h
+++ b/include/hw/arm/fsl-imx6ul.h
@@ -60,7 +60,7 @@ enum FslIMX6ULConfiguration {
FSL_IMX6UL_NUM_USBS = 2,
FSL_IMX6UL_NUM_SAIS = 3,
FSL_IMX6UL_NUM_CANS = 2,
- FSL_IMX6UL_NUM_PWMS = 4,
+ FSL_IMX6UL_NUM_PWMS = 8,
};
struct FslIMX6ULState {