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authorJoel Stanley <joel@jms.id.au>2023-07-19 14:59:20 +0930
committerCédric Le Goater <clg@kaod.org>2023-09-06 11:19:32 +0200
commit99837aa88ce0494f8adb0ebf6bc7ce951f048a8d (patch)
treeaeefd2d0a32298f70e0cf57950831c3b1871ab04
parent0fdf05d774a5f6b701459d61e7875229667cacbd (diff)
ppc: Add stub implementation of TRIG SPRs
Linux sets these to control cache flush behaviour on Power9. Supervisor and hypervisor are allowed to write, and reads are noops. Add implementations to avoid noisy messages when booting Linux under the pseries machine with guest_errors enabled. Reviewed-by: Nicholas Piggin <npiggin@gmail.com> Signed-off-by: Joel Stanley <joel@jms.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
-rw-r--r--target/ppc/cpu.h2
-rw-r--r--target/ppc/cpu_init.c10
2 files changed, 12 insertions, 0 deletions
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 25fac9577a..6826702ea6 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1897,7 +1897,9 @@ void ppc_compat_add_property(Object *obj, const char *name,
#define SPR_PSSCR (0x357)
#define SPR_440_INV0 (0x370)
#define SPR_440_INV1 (0x371)
+#define SPR_TRIG1 (0x371)
#define SPR_440_INV2 (0x372)
+#define SPR_TRIG2 (0x372)
#define SPR_440_INV3 (0x373)
#define SPR_440_ITV0 (0x374)
#define SPR_440_ITV1 (0x375)
diff --git a/target/ppc/cpu_init.c b/target/ppc/cpu_init.c
index 02b7aad9b0..3b6ccb5ea4 100644
--- a/target/ppc/cpu_init.c
+++ b/target/ppc/cpu_init.c
@@ -5660,6 +5660,16 @@ static void register_power_common_book4_sprs(CPUPPCState *env)
SPR_NOACCESS, SPR_NOACCESS,
&spr_read_tfmr, &spr_write_tfmr,
0x00000000);
+ spr_register_hv(env, SPR_TRIG1, "TRIG1",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_access_nop, &spr_write_generic,
+ &spr_access_nop, &spr_write_generic,
+ 0x00000000);
+ spr_register_hv(env, SPR_TRIG2, "TRIG2",
+ SPR_NOACCESS, SPR_NOACCESS,
+ &spr_access_nop, &spr_write_generic,
+ &spr_access_nop, &spr_write_generic,
+ 0x00000000);
#endif
}