diff options
| author | Tao Su <tao1.su@linux.intel.com> | 2023-07-06 13:49:47 +0800 |
|---|---|---|
| committer | Paolo Bonzini <pbonzini@redhat.com> | 2023-07-07 12:52:27 +0200 |
| commit | 6c43ec3b206956a8a3008accafe9eb2dfd885190 (patch) | |
| tree | 6e42117277a2d3109ff80aeb2a993d43fbdc1905 | |
| parent | ba3709feaab44631315e02cd793cfccae4c6bd2a (diff) | |
target/i386: Add new bit definitions of MSR_IA32_ARCH_CAPABILITIES
Currently, bit 13, 14, 15 and 24 of MSR_IA32_ARCH_CAPABILITIES are
disclosed for fixing security issues, so add those bit definitions.
Signed-off-by: Tao Su <tao1.su@linux.intel.com>
Reviewed-by: Igor Mammedov <imammedo@redhat.com>
Message-ID: <20230706054949.66556-5-tao1.su@linux.intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
| -rw-r--r-- | target/i386/cpu.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/target/i386/cpu.h b/target/i386/cpu.h index c196b0a482..e0771a1043 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1022,7 +1022,11 @@ uint64_t x86_cpu_get_supported_feature_word(FeatureWord w, #define MSR_ARCH_CAP_PSCHANGE_MC_NO (1U << 6) #define MSR_ARCH_CAP_TSX_CTRL_MSR (1U << 7) #define MSR_ARCH_CAP_TAA_NO (1U << 8) +#define MSR_ARCH_CAP_SBDR_SSDP_NO (1U << 13) +#define MSR_ARCH_CAP_FBSDP_NO (1U << 14) +#define MSR_ARCH_CAP_PSDP_NO (1U << 15) #define MSR_ARCH_CAP_FB_CLEAR (1U << 17) +#define MSR_ARCH_CAP_PBRSB_NO (1U << 24) #define MSR_CORE_CAP_SPLIT_LOCK_DETECT (1U << 5) |