target-xtensa: remove hand-written xtensa cores implementations

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>

5 files changed, 2 insertions, 968 deletions

diff --git a/Makefile.target b/Makefile.target
index c22b3cb8e3..04369b1a53 100644
--- a/Makefile.target
+++ b/Makefile.target
@@ -370,7 +370,6 @@ obj-alpha-y += vga.o cirrus_vga.o
 obj-alpha-y += alpha_pci.o alpha_dp264.o alpha_typhoon.o
 
 obj-xtensa-y += xtensa_pic.o
-obj-xtensa-y += xtensa_sample.o
 obj-xtensa-y += xtensa_dc232b.o
 obj-xtensa-y += xtensa-semi.o
 
diff --git a/hw/xtensa_sample.c b/hw/xtensa_sample.c
deleted file mode 100644
index 31a6f70825..0000000000
--- a/hw/xtensa_sample.c
+++ /dev/null
@@ -1,107 +0,0 @@
-/*
- * Copyright (c) 2011, Max Filippov, Open Source and Linux Lab.
- * All rights reserved.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of the Open Source and Linux Lab nor the
- *       names of its contributors may be used to endorse or promote products
- *       derived from this software without specific prior written permission.
- *
- * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
- * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
- * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
- * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-
-#include "sysemu.h"
-#include "boards.h"
-#include "loader.h"
-#include "elf.h"
-#include "memory.h"
-#include "exec-memory.h"
-
-static void xtensa_sample_reset(void *env)
-{
-    cpu_reset(env);
-}
-
-static void xtensa_init(ram_addr_t ram_size,
-        const char *boot_device,
-        const char *kernel_filename, const char *kernel_cmdline,
-        const char *initrd_filename, const char *cpu_model)
-{
-    CPUState *env = NULL;
-    MemoryRegion *ram;
-    const size_t dram_size = 0x10000;
-    const size_t iram_size = 0x20000;
-    int n;
-
-    for (n = 0; n < smp_cpus; n++) {
-        env = cpu_init(cpu_model);
-        if (!env) {
-            fprintf(stderr, "Unable to find CPU definition\n");
-            exit(1);
-        }
-        qemu_register_reset(xtensa_sample_reset, env);
-        env->sregs[PRID] = n;
-    }
-
-    ram = g_malloc(sizeof(*ram));
-    memory_region_init_ram(ram, NULL, "xtensa.ram",
-            dram_size + iram_size + ram_size);
-    memory_region_add_subregion(get_system_memory(),
-            0x60000000 - dram_size - iram_size, ram);
-
-    if (kernel_filename) {
-        uint64_t elf_entry;
-        uint64_t elf_lowaddr;
-#ifdef TARGET_WORDS_BIGENDIAN
-        int success = load_elf(kernel_filename, NULL, NULL, &elf_entry,
-                &elf_lowaddr, NULL, 1, ELF_MACHINE, 0);
-#else
-        int success = load_elf(kernel_filename, NULL, NULL, &elf_entry,
-                &elf_lowaddr, NULL, 0, ELF_MACHINE, 0);
-#endif
-        if (success > 0) {
-            env->pc = elf_entry;
-        }
-    }
-}
-
-static void xtensa_sample_init(ram_addr_t ram_size,
-                     const char *boot_device,
-                     const char *kernel_filename, const char *kernel_cmdline,
-                     const char *initrd_filename, const char *cpu_model)
-{
-    if (!cpu_model) {
-        cpu_model = "sample-xtensa-core";
-    }
-    xtensa_init(ram_size, boot_device, kernel_filename, kernel_cmdline,
-                  initrd_filename, cpu_model);
-}
-
-static QEMUMachine xtensa_sample_machine = {
-    .name = "sample-xtensa-machine",
-    .desc = "Sample Xtensa machine (sample Xtensa core)",
-    .init = xtensa_sample_init,
-    .max_cpus = 4,
-};
-
-static void xtensa_sample_machine_init(void)
-{
-    qemu_register_machine(&xtensa_sample_machine);
-}
-
-machine_init(xtensa_sample_machine_init);
diff --git a/target-xtensa/gdb-config-dc232b.c b/target-xtensa/gdb-config-dc232b.c
deleted file mode 100644
index 13aba5edec..0000000000
--- a/target-xtensa/gdb-config-dc232b.c
+++ /dev/null
@@ -1,261 +0,0 @@
-/* Configuration for the Xtensa architecture for GDB, the GNU debugger.
-
-   Copyright (C) 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
-
-   This file is part of GDB.
-
-   This program is free software; you can redistribute it and/or modify
-   it under the terms of the GNU General Public License as published by
-   the Free Software Foundation; either version 2 of the License, or
-   (at your option) any later version.
-
-   This program is distributed in the hope that it will be useful,
-   but WITHOUT ANY WARRANTY; without even the implied warranty of
-   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-   GNU General Public License for more details.
-
-   You should have received a copy of the GNU General Public License
-   along with this program; if not, write to the Free Software
-   Foundation, Inc., 51 Franklin Street, Fifth Floor,
-   Boston, MA 02110-1301, USA.  */
-
-  XTREG(0,   0, 32, 4, 4, 0x0020, 0x0006, -2, 9, 0x0100, pc,
-          0, 0, 0, 0, 0, 0)
-  XTREG(1,   4, 32, 4, 4, 0x0100, 0x0006, -2, 1, 0x0002, ar0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(2,   8, 32, 4, 4, 0x0101, 0x0006, -2, 1, 0x0002, ar1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(3,  12, 32, 4, 4, 0x0102, 0x0006, -2, 1, 0x0002, ar2,
-          0, 0, 0, 0, 0, 0)
-  XTREG(4,  16, 32, 4, 4, 0x0103, 0x0006, -2, 1, 0x0002, ar3,
-          0, 0, 0, 0, 0, 0)
-  XTREG(5,  20, 32, 4, 4, 0x0104, 0x0006, -2, 1, 0x0002, ar4,
-          0, 0, 0, 0, 0, 0)
-  XTREG(6,  24, 32, 4, 4, 0x0105, 0x0006, -2, 1, 0x0002, ar5,
-          0, 0, 0, 0, 0, 0)
-  XTREG(7,  28, 32, 4, 4, 0x0106, 0x0006, -2, 1, 0x0002, ar6,
-          0, 0, 0, 0, 0, 0)
-  XTREG(8,  32, 32, 4, 4, 0x0107, 0x0006, -2, 1, 0x0002, ar7,
-          0, 0, 0, 0, 0, 0)
-  XTREG(9,  36, 32, 4, 4, 0x0108, 0x0006, -2, 1, 0x0002, ar8,
-          0, 0, 0, 0, 0, 0)
-  XTREG(10,  40, 32, 4, 4, 0x0109, 0x0006, -2, 1, 0x0002, ar9,
-          0, 0, 0, 0, 0, 0)
-  XTREG(11,  44, 32, 4, 4, 0x010a, 0x0006, -2, 1, 0x0002, ar10,
-          0, 0, 0, 0, 0, 0)
-  XTREG(12,  48, 32, 4, 4, 0x010b, 0x0006, -2, 1, 0x0002, ar11,
-          0, 0, 0, 0, 0, 0)
-  XTREG(13,  52, 32, 4, 4, 0x010c, 0x0006, -2, 1, 0x0002, ar12,
-          0, 0, 0, 0, 0, 0)
-  XTREG(14,  56, 32, 4, 4, 0x010d, 0x0006, -2, 1, 0x0002, ar13,
-          0, 0, 0, 0, 0, 0)
-  XTREG(15,  60, 32, 4, 4, 0x010e, 0x0006, -2, 1, 0x0002, ar14,
-          0, 0, 0, 0, 0, 0)
-  XTREG(16,  64, 32, 4, 4, 0x010f, 0x0006, -2, 1, 0x0002, ar15,
-          0, 0, 0, 0, 0, 0)
-  XTREG(17,  68, 32, 4, 4, 0x0110, 0x0006, -2, 1, 0x0002, ar16,
-          0, 0, 0, 0, 0, 0)
-  XTREG(18,  72, 32, 4, 4, 0x0111, 0x0006, -2, 1, 0x0002, ar17,
-          0, 0, 0, 0, 0, 0)
-  XTREG(19,  76, 32, 4, 4, 0x0112, 0x0006, -2, 1, 0x0002, ar18,
-          0, 0, 0, 0, 0, 0)
-  XTREG(20,  80, 32, 4, 4, 0x0113, 0x0006, -2, 1, 0x0002, ar19,
-          0, 0, 0, 0, 0, 0)
-  XTREG(21,  84, 32, 4, 4, 0x0114, 0x0006, -2, 1, 0x0002, ar20,
-          0, 0, 0, 0, 0, 0)
-  XTREG(22,  88, 32, 4, 4, 0x0115, 0x0006, -2, 1, 0x0002, ar21,
-          0, 0, 0, 0, 0, 0)
-  XTREG(23,  92, 32, 4, 4, 0x0116, 0x0006, -2, 1, 0x0002, ar22,
-          0, 0, 0, 0, 0, 0)
-  XTREG(24,  96, 32, 4, 4, 0x0117, 0x0006, -2, 1, 0x0002, ar23,
-          0, 0, 0, 0, 0, 0)
-  XTREG(25, 100, 32, 4, 4, 0x0118, 0x0006, -2, 1, 0x0002, ar24,
-          0, 0, 0, 0, 0, 0)
-  XTREG(26, 104, 32, 4, 4, 0x0119, 0x0006, -2, 1, 0x0002, ar25,
-          0, 0, 0, 0, 0, 0)
-  XTREG(27, 108, 32, 4, 4, 0x011a, 0x0006, -2, 1, 0x0002, ar26,
-          0, 0, 0, 0, 0, 0)
-  XTREG(28, 112, 32, 4, 4, 0x011b, 0x0006, -2, 1, 0x0002, ar27,
-          0, 0, 0, 0, 0, 0)
-  XTREG(29, 116, 32, 4, 4, 0x011c, 0x0006, -2, 1, 0x0002, ar28,
-          0, 0, 0, 0, 0, 0)
-  XTREG(30, 120, 32, 4, 4, 0x011d, 0x0006, -2, 1, 0x0002, ar29,
-          0, 0, 0, 0, 0, 0)
-  XTREG(31, 124, 32, 4, 4, 0x011e, 0x0006, -2, 1, 0x0002, ar30,
-          0, 0, 0, 0, 0, 0)
-  XTREG(32, 128, 32, 4, 4, 0x011f, 0x0006, -2, 1, 0x0002, ar31,
-          0, 0, 0, 0, 0, 0)
-  XTREG(33, 132, 32, 4, 4, 0x0200, 0x0006, -2, 2, 0x1100, lbeg,
-          0, 0, 0, 0, 0, 0)
-  XTREG(34, 136, 32, 4, 4, 0x0201, 0x0006, -2, 2, 0x1100, lend,
-          0, 0, 0, 0, 0, 0)
-  XTREG(35, 140, 32, 4, 4, 0x0202, 0x0006, -2, 2, 0x1100, lcount,
-          0, 0, 0, 0, 0, 0)
-  XTREG(36, 144,  6, 4, 4, 0x0203, 0x0006, -2, 2, 0x1100, sar,
-          0, 0, 0, 0, 0, 0)
-  XTREG(37, 148, 32, 4, 4, 0x0205, 0x0006, -2, 2, 0x1100, litbase,
-          0, 0, 0, 0, 0, 0)
-  XTREG(38, 152,  3, 4, 4, 0x0248, 0x0006, -2, 2, 0x1002, windowbase,
-          0, 0, 0, 0, 0, 0)
-  XTREG(39, 156,  8, 4, 4, 0x0249, 0x0006, -2, 2, 0x1002, windowstart,
-          0, 0, 0, 0, 0, 0)
-  XTREG(40, 160, 32, 4, 4, 0x02b0, 0x0002, -2, 2, 0x1000, sr176,
-          0, 0, 0, 0, 0, 0)
-  XTREG(41, 164, 32, 4, 4, 0x02d0, 0x0002, -2, 2, 0x1000, sr208,
-          0, 0, 0, 0, 0, 0)
-  XTREG(42, 168, 19, 4, 4, 0x02e6, 0x0006, -2, 2, 0x1100, ps,
-          0, 0, 0, 0, 0, 0)
-  XTREG(43, 172, 32, 4, 4, 0x03e7, 0x0006, -2, 3, 0x0110, threadptr,
-          0, 0, 0, 0, 0, 0)
-  XTREG(44, 176, 32, 4, 4, 0x020c, 0x0006, -1, 2, 0x1100, scompare1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(45, 180, 32, 4, 4, 0x0210, 0x0006, -1, 2, 0x1100, acclo,
-          0, 0, 0, 0, 0, 0)
-  XTREG(46, 184,  8, 4, 4, 0x0211, 0x0006, -1, 2, 0x1100, acchi,
-          0, 0, 0, 0, 0, 0)
-  XTREG(47, 188, 32, 4, 4, 0x0220, 0x0006, -1, 2, 0x1100, m0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(48, 192, 32, 4, 4, 0x0221, 0x0006, -1, 2, 0x1100, m1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(49, 196, 32, 4, 4, 0x0222, 0x0006, -1, 2, 0x1100, m2,
-          0, 0, 0, 0, 0, 0)
-  XTREG(50, 200, 32, 4, 4, 0x0223, 0x0006, -1, 2, 0x1100, m3,
-          0, 0, 0, 0, 0, 0)
-  XTREG(51, 204, 32, 4, 4, 0x03e6, 0x000e, -1, 3, 0x0110, expstate,
-          0, 0, 0, 0, 0, 0)
-  XTREG(52, 208, 32, 4, 4, 0x0253, 0x0007, -2, 2, 0x1000, ptevaddr,
-          0, 0, 0, 0, 0, 0)
-  XTREG(53, 212, 32, 4, 4, 0x0259, 0x000d, -2, 2, 0x1000, mmid,
-          0, 0, 0, 0, 0, 0)
-  XTREG(54, 216, 32, 4, 4, 0x025a, 0x0007, -2, 2, 0x1000, rasid,
-          0, 0, 0, 0, 0, 0)
-  XTREG(55, 220, 18, 4, 4, 0x025b, 0x0007, -2, 2, 0x1000, itlbcfg,
-          0, 0, 0, 0, 0, 0)
-  XTREG(56, 224, 18, 4, 4, 0x025c, 0x0007, -2, 2, 0x1000, dtlbcfg,
-          0, 0, 0, 0, 0, 0)
-  XTREG(57, 228,  2, 4, 4, 0x0260, 0x0007, -2, 2, 0x1000, ibreakenable,
-          0, 0, 0, 0, 0, 0)
-  XTREG(58, 232, 32, 4, 4, 0x0268, 0x0007, -2, 2, 0x1000, ddr,
-          0, 0, 0, 0, 0, 0)
-  XTREG(59, 236, 32, 4, 4, 0x0280, 0x0007, -2, 2, 0x1000, ibreaka0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(60, 240, 32, 4, 4, 0x0281, 0x0007, -2, 2, 0x1000, ibreaka1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(61, 244, 32, 4, 4, 0x0290, 0x0007, -2, 2, 0x1000, dbreaka0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(62, 248, 32, 4, 4, 0x0291, 0x0007, -2, 2, 0x1000, dbreaka1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(63, 252, 32, 4, 4, 0x02a0, 0x0007, -2, 2, 0x1000, dbreakc0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(64, 256, 32, 4, 4, 0x02a1, 0x0007, -2, 2, 0x1000, dbreakc1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(65, 260, 32, 4, 4, 0x02b1, 0x0007, -2, 2, 0x1000, epc1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(66, 264, 32, 4, 4, 0x02b2, 0x0007, -2, 2, 0x1000, epc2,
-          0, 0, 0, 0, 0, 0)
-  XTREG(67, 268, 32, 4, 4, 0x02b3, 0x0007, -2, 2, 0x1000, epc3,
-          0, 0, 0, 0, 0, 0)
-  XTREG(68, 272, 32, 4, 4, 0x02b4, 0x0007, -2, 2, 0x1000, epc4,
-          0, 0, 0, 0, 0, 0)
-  XTREG(69, 276, 32, 4, 4, 0x02b5, 0x0007, -2, 2, 0x1000, epc5,
-          0, 0, 0, 0, 0, 0)
-  XTREG(70, 280, 32, 4, 4, 0x02b6, 0x0007, -2, 2, 0x1000, epc6,
-          0, 0, 0, 0, 0, 0)
-  XTREG(71, 284, 32, 4, 4, 0x02b7, 0x0007, -2, 2, 0x1000, epc7,
-          0, 0, 0, 0, 0, 0)
-  XTREG(72, 288, 32, 4, 4, 0x02c0, 0x0007, -2, 2, 0x1000, depc,
-          0, 0, 0, 0, 0, 0)
-  XTREG(73, 292, 19, 4, 4, 0x02c2, 0x0007, -2, 2, 0x1000, eps2,
-          0, 0, 0, 0, 0, 0)
-  XTREG(74, 296, 19, 4, 4, 0x02c3, 0x0007, -2, 2, 0x1000, eps3,
-          0, 0, 0, 0, 0, 0)
-  XTREG(75, 300, 19, 4, 4, 0x02c4, 0x0007, -2, 2, 0x1000, eps4,
-          0, 0, 0, 0, 0, 0)
-  XTREG(76, 304, 19, 4, 4, 0x02c5, 0x0007, -2, 2, 0x1000, eps5,
-          0, 0, 0, 0, 0, 0)
-  XTREG(77, 308, 19, 4, 4, 0x02c6, 0x0007, -2, 2, 0x1000, eps6,
-          0, 0, 0, 0, 0, 0)
-  XTREG(78, 312, 19, 4, 4, 0x02c7, 0x0007, -2, 2, 0x1000, eps7,
-          0, 0, 0, 0, 0, 0)
-  XTREG(79, 316, 32, 4, 4, 0x02d1, 0x0007, -2, 2, 0x1000, excsave1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(80, 320, 32, 4, 4, 0x02d2, 0x0007, -2, 2, 0x1000, excsave2,
-          0, 0, 0, 0, 0, 0)
-  XTREG(81, 324, 32, 4, 4, 0x02d3, 0x0007, -2, 2, 0x1000, excsave3,
-          0, 0, 0, 0, 0, 0)
-  XTREG(82, 328, 32, 4, 4, 0x02d4, 0x0007, -2, 2, 0x1000, excsave4,
-          0, 0, 0, 0, 0, 0)
-  XTREG(83, 332, 32, 4, 4, 0x02d5, 0x0007, -2, 2, 0x1000, excsave5,
-          0, 0, 0, 0, 0, 0)
-  XTREG(84, 336, 32, 4, 4, 0x02d6, 0x0007, -2, 2, 0x1000, excsave6,
-          0, 0, 0, 0, 0, 0)
-  XTREG(85, 340, 32, 4, 4, 0x02d7, 0x0007, -2, 2, 0x1000, excsave7,
-          0, 0, 0, 0, 0, 0)
-  XTREG(86, 344,  8, 4, 4, 0x02e0, 0x0007, -2, 2, 0x1000, cpenable,
-          0, 0, 0, 0, 0, 0)
-  XTREG(87, 348, 22, 4, 4, 0x02e2, 0x000b, -2, 2, 0x1000, interrupt,
-          0, 0, 0, 0, 0, 0)
-  XTREG(88, 352, 22, 4, 4, 0x02e2, 0x000d, -2, 2, 0x1000, intset,
-          0, 0, 0, 0, 0, 0)
-  XTREG(89, 356, 22, 4, 4, 0x02e3, 0x000d, -2, 2, 0x1000, intclear,
-          0, 0, 0, 0, 0, 0)
-  XTREG(90, 360, 22, 4, 4, 0x02e4, 0x0007, -2, 2, 0x1000, intenable,
-          0, 0, 0, 0, 0, 0)
-  XTREG(91, 364, 32, 4, 4, 0x02e7, 0x0007, -2, 2, 0x1000, vecbase,
-          0, 0, 0, 0, 0, 0)
-  XTREG(92, 368,  6, 4, 4, 0x02e8, 0x0007, -2, 2, 0x1000, exccause,
-          0, 0, 0, 0, 0, 0)
-  XTREG(93, 372, 12, 4, 4, 0x02e9, 0x0003, -2, 2, 0x1000, debugcause,
-          0, 0, 0, 0, 0, 0)
-  XTREG(94, 376, 32, 4, 4, 0x02ea, 0x000f, -2, 2, 0x1000, ccount,
-          0, 0, 0, 0, 0, 0)
-  XTREG(95, 380, 32, 4, 4, 0x02eb, 0x0003, -2, 2, 0x1000, prid,
-          0, 0, 0, 0, 0, 0)
-  XTREG(96, 384, 32, 4, 4, 0x02ec, 0x000f, -2, 2, 0x1000, icount,
-          0, 0, 0, 0, 0, 0)
-  XTREG(97, 388,  4, 4, 4, 0x02ed, 0x0007, -2, 2, 0x1000, icountlevel,
-          0, 0, 0, 0, 0, 0)
-  XTREG(98, 392, 32, 4, 4, 0x02ee, 0x0007, -2, 2, 0x1000, excvaddr,
-          0, 0, 0, 0, 0, 0)
-  XTREG(99, 396, 32, 4, 4, 0x02f0, 0x000f, -2, 2, 0x1000, ccompare0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(100, 400, 32, 4, 4, 0x02f1, 0x000f, -2, 2, 0x1000, ccompare1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(101, 404, 32, 4, 4, 0x02f2, 0x000f, -2, 2, 0x1000, ccompare2,
-          0, 0, 0, 0, 0, 0)
-  XTREG(102, 408, 32, 4, 4, 0x02f4, 0x0007, -2, 2, 0x1000, misc0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(103, 412, 32, 4, 4, 0x02f5, 0x0007, -2, 2, 0x1000, misc1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(104, 416, 32, 4, 4, 0x0000, 0x0006, -2, 8, 0x0100, a0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(105, 420, 32, 4, 4, 0x0001, 0x0006, -2, 8, 0x0100, a1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(106, 424, 32, 4, 4, 0x0002, 0x0006, -2, 8, 0x0100, a2,
-          0, 0, 0, 0, 0, 0)
-  XTREG(107, 428, 32, 4, 4, 0x0003, 0x0006, -2, 8, 0x0100, a3,
-          0, 0, 0, 0, 0, 0)
-  XTREG(108, 432, 32, 4, 4, 0x0004, 0x0006, -2, 8, 0x0100, a4,
-          0, 0, 0, 0, 0, 0)
-  XTREG(109, 436, 32, 4, 4, 0x0005, 0x0006, -2, 8, 0x0100, a5,
-          0, 0, 0, 0, 0, 0)
-  XTREG(110, 440, 32, 4, 4, 0x0006, 0x0006, -2, 8, 0x0100, a6,
-          0, 0, 0, 0, 0, 0)
-  XTREG(111, 444, 32, 4, 4, 0x0007, 0x0006, -2, 8, 0x0100, a7,
-          0, 0, 0, 0, 0, 0)
-  XTREG(112, 448, 32, 4, 4, 0x0008, 0x0006, -2, 8, 0x0100, a8,
-          0, 0, 0, 0, 0, 0)
-  XTREG(113, 452, 32, 4, 4, 0x0009, 0x0006, -2, 8, 0x0100, a9,
-          0, 0, 0, 0, 0, 0)
-  XTREG(114, 456, 32, 4, 4, 0x000a, 0x0006, -2, 8, 0x0100, a10,
-          0, 0, 0, 0, 0, 0)
-  XTREG(115, 460, 32, 4, 4, 0x000b, 0x0006, -2, 8, 0x0100, a11,
-          0, 0, 0, 0, 0, 0)
-  XTREG(116, 464, 32, 4, 4, 0x000c, 0x0006, -2, 8, 0x0100, a12,
-          0, 0, 0, 0, 0, 0)
-  XTREG(117, 468, 32, 4, 4, 0x000d, 0x0006, -2, 8, 0x0100, a13,
-          0, 0, 0, 0, 0, 0)
-  XTREG(118, 472, 32, 4, 4, 0x000e, 0x0006, -2, 8, 0x0100, a14,
-          0, 0, 0, 0, 0, 0)
-  XTREG(119, 476, 32, 4, 4, 0x000f, 0x0006, -2, 8, 0x0100, a15,
-          0, 0, 0, 0, 0, 0)
diff --git a/target-xtensa/gdb-config-sample-xtensa-core.c b/target-xtensa/gdb-config-sample-xtensa-core.c
deleted file mode 100644
index bfbd7be30a..0000000000
--- a/target-xtensa/gdb-config-sample-xtensa-core.c
+++ /dev/null
@@ -1,375 +0,0 @@
-/* Configuration for the Xtensa architecture for GDB, the GNU debugger.
-
-   Copyright (c) 2003-2010 Tensilica Inc.
-
-   Permission is hereby granted, free of charge, to any person obtaining
-   a copy of this software and associated documentation files (the
-   "Software"), to deal in the Software without restriction, including
-   without limitation the rights to use, copy, modify, merge, publish,
-   distribute, sublicense, and/or sell copies of the Software, and to
-   permit persons to whom the Software is furnished to do so, subject to
-   the following conditions:
-
-   The above copyright notice and this permission notice shall be included
-   in all copies or substantial portions of the Software.
-
-   THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
-   EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
-   MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
-   IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY
-   CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
-   TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
-   SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
-
-  XTREG(0,   0, 32, 4, 4, 0x0020, 0x0006, -2, 9, 0x0100, pc,
-          0, 0, 0, 0, 0, 0)
-  XTREG(1,   4, 32, 4, 4, 0x0100, 0x0006, -2, 1, 0x0002, ar0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(2,   8, 32, 4, 4, 0x0101, 0x0006, -2, 1, 0x0002, ar1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(3,  12, 32, 4, 4, 0x0102, 0x0006, -2, 1, 0x0002, ar2,
-          0, 0, 0, 0, 0, 0)
-  XTREG(4,  16, 32, 4, 4, 0x0103, 0x0006, -2, 1, 0x0002, ar3,
-          0, 0, 0, 0, 0, 0)
-  XTREG(5,  20, 32, 4, 4, 0x0104, 0x0006, -2, 1, 0x0002, ar4,
-          0, 0, 0, 0, 0, 0)
-  XTREG(6,  24, 32, 4, 4, 0x0105, 0x0006, -2, 1, 0x0002, ar5,
-          0, 0, 0, 0, 0, 0)
-  XTREG(7,  28, 32, 4, 4, 0x0106, 0x0006, -2, 1, 0x0002, ar6,
-          0, 0, 0, 0, 0, 0)
-  XTREG(8,  32, 32, 4, 4, 0x0107, 0x0006, -2, 1, 0x0002, ar7,
-          0, 0, 0, 0, 0, 0)
-  XTREG(9,  36, 32, 4, 4, 0x0108, 0x0006, -2, 1, 0x0002, ar8,
-          0, 0, 0, 0, 0, 0)
-  XTREG(10,  40, 32, 4, 4, 0x0109, 0x0006, -2, 1, 0x0002, ar9,
-          0, 0, 0, 0, 0, 0)
-  XTREG(11,  44, 32, 4, 4, 0x010a, 0x0006, -2, 1, 0x0002, ar10,
-          0, 0, 0, 0, 0, 0)
-  XTREG(12,  48, 32, 4, 4, 0x010b, 0x0006, -2, 1, 0x0002, ar11,
-          0, 0, 0, 0, 0, 0)
-  XTREG(13,  52, 32, 4, 4, 0x010c, 0x0006, -2, 1, 0x0002, ar12,
-          0, 0, 0, 0, 0, 0)
-  XTREG(14,  56, 32, 4, 4, 0x010d, 0x0006, -2, 1, 0x0002, ar13,
-          0, 0, 0, 0, 0, 0)
-  XTREG(15,  60, 32, 4, 4, 0x010e, 0x0006, -2, 1, 0x0002, ar14,
-          0, 0, 0, 0, 0, 0)
-  XTREG(16,  64, 32, 4, 4, 0x010f, 0x0006, -2, 1, 0x0002, ar15,
-          0, 0, 0, 0, 0, 0)
-  XTREG(17,  68, 32, 4, 4, 0x0110, 0x0006, -2, 1, 0x0002, ar16,
-          0, 0, 0, 0, 0, 0)
-  XTREG(18,  72, 32, 4, 4, 0x0111, 0x0006, -2, 1, 0x0002, ar17,
-          0, 0, 0, 0, 0, 0)
-  XTREG(19,  76, 32, 4, 4, 0x0112, 0x0006, -2, 1, 0x0002, ar18,
-          0, 0, 0, 0, 0, 0)
-  XTREG(20,  80, 32, 4, 4, 0x0113, 0x0006, -2, 1, 0x0002, ar19,
-          0, 0, 0, 0, 0, 0)
-  XTREG(21,  84, 32, 4, 4, 0x0114, 0x0006, -2, 1, 0x0002, ar20,
-          0, 0, 0, 0, 0, 0)
-  XTREG(22,  88, 32, 4, 4, 0x0115, 0x0006, -2, 1, 0x0002, ar21,
-          0, 0, 0, 0, 0, 0)
-  XTREG(23,  92, 32, 4, 4, 0x0116, 0x0006, -2, 1, 0x0002, ar22,
-          0, 0, 0, 0, 0, 0)
-  XTREG(24,  96, 32, 4, 4, 0x0117, 0x0006, -2, 1, 0x0002, ar23,
-          0, 0, 0, 0, 0, 0)
-  XTREG(25, 100, 32, 4, 4, 0x0118, 0x0006, -2, 1, 0x0002, ar24,
-          0, 0, 0, 0, 0, 0)
-  XTREG(26, 104, 32, 4, 4, 0x0119, 0x0006, -2, 1, 0x0002, ar25,
-          0, 0, 0, 0, 0, 0)
-  XTREG(27, 108, 32, 4, 4, 0x011a, 0x0006, -2, 1, 0x0002, ar26,
-          0, 0, 0, 0, 0, 0)
-  XTREG(28, 112, 32, 4, 4, 0x011b, 0x0006, -2, 1, 0x0002, ar27,
-          0, 0, 0, 0, 0, 0)
-  XTREG(29, 116, 32, 4, 4, 0x011c, 0x0006, -2, 1, 0x0002, ar28,
-          0, 0, 0, 0, 0, 0)
-  XTREG(30, 120, 32, 4, 4, 0x011d, 0x0006, -2, 1, 0x0002, ar29,
-          0, 0, 0, 0, 0, 0)
-  XTREG(31, 124, 32, 4, 4, 0x011e, 0x0006, -2, 1, 0x0002, ar30,
-          0, 0, 0, 0, 0, 0)
-  XTREG(32, 128, 32, 4, 4, 0x011f, 0x0006, -2, 1, 0x0002, ar31,
-          0, 0, 0, 0, 0, 0)
-  XTREG(33, 132, 32, 4, 4, 0x0120, 0x0006, -2, 1, 0x0002, ar32,
-          0, 0, 0, 0, 0, 0)
-  XTREG(34, 136, 32, 4, 4, 0x0121, 0x0006, -2, 1, 0x0002, ar33,
-          0, 0, 0, 0, 0, 0)
-  XTREG(35, 140, 32, 4, 4, 0x0122, 0x0006, -2, 1, 0x0002, ar34,
-          0, 0, 0, 0, 0, 0)
-  XTREG(36, 144, 32, 4, 4, 0x0123, 0x0006, -2, 1, 0x0002, ar35,
-          0, 0, 0, 0, 0, 0)
-  XTREG(37, 148, 32, 4, 4, 0x0124, 0x0006, -2, 1, 0x0002, ar36,
-          0, 0, 0, 0, 0, 0)
-  XTREG(38, 152, 32, 4, 4, 0x0125, 0x0006, -2, 1, 0x0002, ar37,
-          0, 0, 0, 0, 0, 0)
-  XTREG(39, 156, 32, 4, 4, 0x0126, 0x0006, -2, 1, 0x0002, ar38,
-          0, 0, 0, 0, 0, 0)
-  XTREG(40, 160, 32, 4, 4, 0x0127, 0x0006, -2, 1, 0x0002, ar39,
-          0, 0, 0, 0, 0, 0)
-  XTREG(41, 164, 32, 4, 4, 0x0128, 0x0006, -2, 1, 0x0002, ar40,
-          0, 0, 0, 0, 0, 0)
-  XTREG(42, 168, 32, 4, 4, 0x0129, 0x0006, -2, 1, 0x0002, ar41,
-          0, 0, 0, 0, 0, 0)
-  XTREG(43, 172, 32, 4, 4, 0x012a, 0x0006, -2, 1, 0x0002, ar42,
-          0, 0, 0, 0, 0, 0)
-  XTREG(44, 176, 32, 4, 4, 0x012b, 0x0006, -2, 1, 0x0002, ar43,
-          0, 0, 0, 0, 0, 0)
-  XTREG(45, 180, 32, 4, 4, 0x012c, 0x0006, -2, 1, 0x0002, ar44,
-          0, 0, 0, 0, 0, 0)
-  XTREG(46, 184, 32, 4, 4, 0x012d, 0x0006, -2, 1, 0x0002, ar45,
-          0, 0, 0, 0, 0, 0)
-  XTREG(47, 188, 32, 4, 4, 0x012e, 0x0006, -2, 1, 0x0002, ar46,
-          0, 0, 0, 0, 0, 0)
-  XTREG(48, 192, 32, 4, 4, 0x012f, 0x0006, -2, 1, 0x0002, ar47,
-          0, 0, 0, 0, 0, 0)
-  XTREG(49, 196, 32, 4, 4, 0x0130, 0x0006, -2, 1, 0x0002, ar48,
-          0, 0, 0, 0, 0, 0)
-  XTREG(50, 200, 32, 4, 4, 0x0131, 0x0006, -2, 1, 0x0002, ar49,
-          0, 0, 0, 0, 0, 0)
-  XTREG(51, 204, 32, 4, 4, 0x0132, 0x0006, -2, 1, 0x0002, ar50,
-          0, 0, 0, 0, 0, 0)
-  XTREG(52, 208, 32, 4, 4, 0x0133, 0x0006, -2, 1, 0x0002, ar51,
-          0, 0, 0, 0, 0, 0)
-  XTREG(53, 212, 32, 4, 4, 0x0134, 0x0006, -2, 1, 0x0002, ar52,
-          0, 0, 0, 0, 0, 0)
-  XTREG(54, 216, 32, 4, 4, 0x0135, 0x0006, -2, 1, 0x0002, ar53,
-          0, 0, 0, 0, 0, 0)
-  XTREG(55, 220, 32, 4, 4, 0x0136, 0x0006, -2, 1, 0x0002, ar54,
-          0, 0, 0, 0, 0, 0)
-  XTREG(56, 224, 32, 4, 4, 0x0137, 0x0006, -2, 1, 0x0002, ar55,
-          0, 0, 0, 0, 0, 0)
-  XTREG(57, 228, 32, 4, 4, 0x0138, 0x0006, -2, 1, 0x0002, ar56,
-          0, 0, 0, 0, 0, 0)
-  XTREG(58, 232, 32, 4, 4, 0x0139, 0x0006, -2, 1, 0x0002, ar57,
-          0, 0, 0, 0, 0, 0)
-  XTREG(59, 236, 32, 4, 4, 0x013a, 0x0006, -2, 1, 0x0002, ar58,
-          0, 0, 0, 0, 0, 0)
-  XTREG(60, 240, 32, 4, 4, 0x013b, 0x0006, -2, 1, 0x0002, ar59,
-          0, 0, 0, 0, 0, 0)
-  XTREG(61, 244, 32, 4, 4, 0x013c, 0x0006, -2, 1, 0x0002, ar60,
-          0, 0, 0, 0, 0, 0)
-  XTREG(62, 248, 32, 4, 4, 0x013d, 0x0006, -2, 1, 0x0002, ar61,
-          0, 0, 0, 0, 0, 0)
-  XTREG(63, 252, 32, 4, 4, 0x013e, 0x0006, -2, 1, 0x0002, ar62,
-          0, 0, 0, 0, 0, 0)
-  XTREG(64, 256, 32, 4, 4, 0x013f, 0x0006, -2, 1, 0x0002, ar63,
-          0, 0, 0, 0, 0, 0)
-  XTREG(65, 260, 32, 4, 4, 0x0200, 0x0006, -2, 2, 0x1100, lbeg,
-          0, 0, 0, 0, 0, 0)
-  XTREG(66, 264, 32, 4, 4, 0x0201, 0x0006, -2, 2, 0x1100, lend,
-          0, 0, 0, 0, 0, 0)
-  XTREG(67, 268, 32, 4, 4, 0x0202, 0x0006, -2, 2, 0x1100, lcount,
-          0, 0, 0, 0, 0, 0)
-  XTREG(68, 272,  6, 4, 4, 0x0203, 0x0006, -2, 2, 0x1100, sar,
-          0, 0, 0, 0, 0, 0)
-  XTREG(69, 276, 32, 4, 4, 0x0205, 0x0006, -2, 2, 0x1100, litbase,
-          0, 0, 0, 0, 0, 0)
-  XTREG(70, 280,  4, 4, 4, 0x0248, 0x0006, -2, 2, 0x1002, windowbase,
-          0, 0, 0, 0, 0, 0)
-  XTREG(71, 284, 16, 4, 4, 0x0249, 0x0006, -2, 2, 0x1002, windowstart,
-          0, 0, 0, 0, 0, 0)
-  XTREG(72, 288, 32, 4, 4, 0x02b0, 0x0002, -2, 2, 0x1000, sr176,
-          0, 0, 0, 0, 0, 0)
-  XTREG(73, 292, 32, 4, 4, 0x02d0, 0x0002, -2, 2, 0x1000, sr208,
-          0, 0, 0, 0, 0, 0)
-  XTREG(74, 296, 19, 4, 4, 0x02e6, 0x0006, -2, 2, 0x1100, ps,
-          0, 0, 0, 0, 0, 0)
-  XTREG(75, 300, 32, 4, 4, 0x03e7, 0x0006, -2, 3, 0x0110, threadptr,
-          0, 0, 0, 0, 0, 0)
-  XTREG(76, 304, 32, 4, 4, 0x020c, 0x0006, -1, 2, 0x1100, scompare1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(77, 308, 32, 4, 4, 0x0327, 0x000e, -1, 3, 0x0210, expstate,
-          0, 0, 0, 0, 0, 0)
-  XTREG(78, 312, 32, 4, 4, 0x0300, 0x0006,  2, 3, 0x0210, stage1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(79, 316, 32, 4, 4, 0x0301, 0x0006,  2, 3, 0x0210, stage2,
-          0, 0, 0, 0, 0, 0)
-  XTREG(80, 320, 32, 4, 4, 0x0302, 0x0006,  2, 3, 0x0210, input_align_reg,
-          0, 0, 0, 0, 0, 0)
-  XTREG(81, 324,  6, 4, 4, 0x0303, 0x0006,  2, 3, 0x0210, input_align_reg_pos,
-          0, 0, 0, 0, 0, 0)
-  XTREG(82, 328, 32, 4, 4, 0x0304, 0x0006,  2, 3, 0x0210, data_reg,
-          0, 0, 0, 0, 0, 0)
-  XTREG(83, 332,  7, 4, 4, 0x0305, 0x0006,  2, 3, 0x0210, data_reg_pos,
-          0, 0, 0, 0, 0, 0)
-  XTREG(84, 336, 32, 4, 4, 0x0306, 0x0006,  2, 3, 0x0210, crc_reg,
-          0, 0, 0, 0, 0, 0)
-  XTREG(85, 340, 32, 4, 4, 0x0307, 0x0006,  2, 3, 0x0210, pol_reg00,
-          0, 0, 0, 0, 0, 0)
-  XTREG(86, 344, 32, 4, 4, 0x0308, 0x0006,  2, 3, 0x0210, pol_reg01,
-          0, 0, 0, 0, 0, 0)
-  XTREG(87, 348, 32, 4, 4, 0x0309, 0x0006,  2, 3, 0x0210, pol_reg02,
-          0, 0, 0, 0, 0, 0)
-  XTREG(88, 352, 32, 4, 4, 0x030a, 0x0006,  2, 3, 0x0210, pol_reg03,
-          0, 0, 0, 0, 0, 0)
-  XTREG(89, 356, 32, 4, 4, 0x030b, 0x0006,  2, 3, 0x0210, pol_reg04,
-          0, 0, 0, 0, 0, 0)
-  XTREG(90, 360, 32, 4, 4, 0x030c, 0x0006,  2, 3, 0x0210, pol_reg05,
-          0, 0, 0, 0, 0, 0)
-  XTREG(91, 364, 32, 4, 4, 0x030d, 0x0006,  2, 3, 0x0210, pol_reg06,
-          0, 0, 0, 0, 0, 0)
-  XTREG(92, 368, 32, 4, 4, 0x030e, 0x0006,  2, 3, 0x0210, pol_reg07,
-          0, 0, 0, 0, 0, 0)
-  XTREG(93, 372, 32, 4, 4, 0x030f, 0x0006,  2, 3, 0x0210, pol_reg08,
-          0, 0, 0, 0, 0, 0)
-  XTREG(94, 376, 32, 4, 4, 0x0310, 0x0006,  2, 3, 0x0210, pol_reg09,
-          0, 0, 0, 0, 0, 0)
-  XTREG(95, 380, 32, 4, 4, 0x0311, 0x0006,  2, 3, 0x0210, pol_reg10,
-          0, 0, 0, 0, 0, 0)
-  XTREG(96, 384, 32, 4, 4, 0x0312, 0x0006,  2, 3, 0x0210, pol_reg11,
-          0, 0, 0, 0, 0, 0)
-  XTREG(97, 388, 32, 4, 4, 0x0313, 0x0006,  2, 3, 0x0210, pol_reg12,
-          0, 0, 0, 0, 0, 0)
-  XTREG(98, 392, 32, 4, 4, 0x0314, 0x0006,  2, 3, 0x0210, pol_reg13,
-          0, 0, 0, 0, 0, 0)
-  XTREG(99, 396, 32, 4, 4, 0x0315, 0x0006,  2, 3, 0x0210, pol_reg14,
-          0, 0, 0, 0, 0, 0)
-  XTREG(100, 400, 32, 4, 4, 0x0316, 0x0006,  2, 3, 0x0210, pol_reg15,
-          0, 0, 0, 0, 0, 0)
-  XTREG(101, 404, 32, 4, 4, 0x0317, 0x0006,  2, 3, 0x0210, pol_reg16,
-          0, 0, 0, 0, 0, 0)
-  XTREG(102, 408, 32, 4, 4, 0x0318, 0x0006,  2, 3, 0x0210, pol_reg17,
-          0, 0, 0, 0, 0, 0)
-  XTREG(103, 412, 32, 4, 4, 0x0319, 0x0006,  2, 3, 0x0210, pol_reg18,
-          0, 0, 0, 0, 0, 0)
-  XTREG(104, 416, 32, 4, 4, 0x031a, 0x0006,  2, 3, 0x0210, pol_reg19,
-          0, 0, 0, 0, 0, 0)
-  XTREG(105, 420, 32, 4, 4, 0x031b, 0x0006,  2, 3, 0x0210, pol_reg20,
-          0, 0, 0, 0, 0, 0)
-  XTREG(106, 424, 32, 4, 4, 0x031c, 0x0006,  2, 3, 0x0210, pol_reg21,
-          0, 0, 0, 0, 0, 0)
-  XTREG(107, 428, 32, 4, 4, 0x031d, 0x0006,  2, 3, 0x0210, pol_reg22,
-          0, 0, 0, 0, 0, 0)
-  XTREG(108, 432, 32, 4, 4, 0x031e, 0x0006,  2, 3, 0x0210, pol_reg23,
-          0, 0, 0, 0, 0, 0)
-  XTREG(109, 436, 32, 4, 4, 0x031f, 0x0006,  2, 3, 0x0210, pol_reg24,
-          0, 0, 0, 0, 0, 0)
-  XTREG(110, 440, 32, 4, 4, 0x0320, 0x0006,  2, 3, 0x0210, pol_reg25,
-          0, 0, 0, 0, 0, 0)
-  XTREG(111, 444, 32, 4, 4, 0x0321, 0x0006,  2, 3, 0x0210, pol_reg26,
-          0, 0, 0, 0, 0, 0)
-  XTREG(112, 448, 32, 4, 4, 0x0322, 0x0006,  2, 3, 0x0210, pol_reg27,
-          0, 0, 0, 0, 0, 0)
-  XTREG(113, 452, 32, 4, 4, 0x0323, 0x0006,  2, 3, 0x0210, pol_reg28,
-          0, 0, 0, 0, 0, 0)
-  XTREG(114, 456, 32, 4, 4, 0x0324, 0x0006,  2, 3, 0x0210, pol_reg29,
-          0, 0, 0, 0, 0, 0)
-  XTREG(115, 460, 32, 4, 4, 0x0325, 0x0006,  2, 3, 0x0210, pol_reg30,
-          0, 0, 0, 0, 0, 0)
-  XTREG(116, 464, 32, 4, 4, 0x0326, 0x0006,  2, 3, 0x0210, pol_reg31,
-          0, 0, 0, 0, 0, 0)
-  XTREG(117, 468, 32, 4, 4, 0x0259, 0x000d, -2, 2, 0x1000, mmid,
-          0, 0, 0, 0, 0, 0)
-  XTREG(118, 472,  2, 4, 4, 0x0260, 0x0007, -2, 2, 0x1000, ibreakenable,
-          0, 0, 0, 0, 0, 0)
-  XTREG(119, 476,  6, 4, 4, 0x0263, 0x0007, -2, 2, 0x1000, atomctl,
-          0, 0, 0, 0, 0, 0)
-  XTREG(120, 480, 32, 4, 4, 0x0268, 0x0007, -2, 2, 0x1000, ddr,
-          0, 0, 0, 0, 0, 0)
-  XTREG(121, 484, 32, 4, 4, 0x0280, 0x0007, -2, 2, 0x1000, ibreaka0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(122, 488, 32, 4, 4, 0x0281, 0x0007, -2, 2, 0x1000, ibreaka1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(123, 492, 32, 4, 4, 0x0290, 0x0007, -2, 2, 0x1000, dbreaka0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(124, 496, 32, 4, 4, 0x0291, 0x0007, -2, 2, 0x1000, dbreaka1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(125, 500, 32, 4, 4, 0x02a0, 0x0007, -2, 2, 0x1000, dbreakc0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(126, 504, 32, 4, 4, 0x02a1, 0x0007, -2, 2, 0x1000, dbreakc1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(127, 508, 32, 4, 4, 0x02b1, 0x0007, -2, 2, 0x1000, epc1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(128, 512, 32, 4, 4, 0x02b2, 0x0007, -2, 2, 0x1000, epc2,
-          0, 0, 0, 0, 0, 0)
-  XTREG(129, 516, 32, 4, 4, 0x02b3, 0x0007, -2, 2, 0x1000, epc3,
-          0, 0, 0, 0, 0, 0)
-  XTREG(130, 520, 32, 4, 4, 0x02b4, 0x0007, -2, 2, 0x1000, epc4,
-          0, 0, 0, 0, 0, 0)
-  XTREG(131, 524, 32, 4, 4, 0x02b5, 0x0007, -2, 2, 0x1000, epc5,
-          0, 0, 0, 0, 0, 0)
-  XTREG(132, 528, 32, 4, 4, 0x02b6, 0x0007, -2, 2, 0x1000, epc6,
-          0, 0, 0, 0, 0, 0)
-  XTREG(133, 532, 32, 4, 4, 0x02c0, 0x0007, -2, 2, 0x1000, depc,
-          0, 0, 0, 0, 0, 0)
-  XTREG(134, 536, 19, 4, 4, 0x02c2, 0x0007, -2, 2, 0x1000, eps2,
-          0, 0, 0, 0, 0, 0)
-  XTREG(135, 540, 19, 4, 4, 0x02c3, 0x0007, -2, 2, 0x1000, eps3,
-          0, 0, 0, 0, 0, 0)
-  XTREG(136, 544, 19, 4, 4, 0x02c4, 0x0007, -2, 2, 0x1000, eps4,
-          0, 0, 0, 0, 0, 0)
-  XTREG(137, 548, 19, 4, 4, 0x02c5, 0x0007, -2, 2, 0x1000, eps5,
-          0, 0, 0, 0, 0, 0)
-  XTREG(138, 552, 19, 4, 4, 0x02c6, 0x0007, -2, 2, 0x1000, eps6,
-          0, 0, 0, 0, 0, 0)
-  XTREG(139, 556, 32, 4, 4, 0x02d1, 0x0007, -2, 2, 0x1000, excsave1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(140, 560, 32, 4, 4, 0x02d2, 0x0007, -2, 2, 0x1000, excsave2,
-          0, 0, 0, 0, 0, 0)
-  XTREG(141, 564, 32, 4, 4, 0x02d3, 0x0007, -2, 2, 0x1000, excsave3,
-          0, 0, 0, 0, 0, 0)
-  XTREG(142, 568, 32, 4, 4, 0x02d4, 0x0007, -2, 2, 0x1000, excsave4,
-          0, 0, 0, 0, 0, 0)
-  XTREG(143, 572, 32, 4, 4, 0x02d5, 0x0007, -2, 2, 0x1000, excsave5,
-          0, 0, 0, 0, 0, 0)
-  XTREG(144, 576, 32, 4, 4, 0x02d6, 0x0007, -2, 2, 0x1000, excsave6,
-          0, 0, 0, 0, 0, 0)
-  XTREG(145, 580,  4, 4, 4, 0x02e0, 0x0007, -2, 2, 0x1000, cpenable,
-          0, 0, 0, 0, 0, 0)
-  XTREG(146, 584, 13, 4, 4, 0x02e2, 0x000b, -2, 2, 0x1000, interrupt,
-          0, 0, 0, 0, 0, 0)
-  XTREG(147, 588, 13, 4, 4, 0x02e2, 0x000d, -2, 2, 0x1000, intset,
-          0, 0, 0, 0, 0, 0)
-  XTREG(148, 592, 13, 4, 4, 0x02e3, 0x000d, -2, 2, 0x1000, intclear,
-          0, 0, 0, 0, 0, 0)
-  XTREG(149, 596, 13, 4, 4, 0x02e4, 0x0007, -2, 2, 0x1000, intenable,
-          0, 0, 0, 0, 0, 0)
-  XTREG(150, 600, 32, 4, 4, 0x02e7, 0x0007, -2, 2, 0x1000, vecbase,
-          0, 0, 0, 0, 0, 0)
-  XTREG(151, 604,  6, 4, 4, 0x02e8, 0x0007, -2, 2, 0x1000, exccause,
-          0, 0, 0, 0, 0, 0)
-  XTREG(152, 608, 12, 4, 4, 0x02e9, 0x0003, -2, 2, 0x1000, debugcause,
-          0, 0, 0, 0, 0, 0)
-  XTREG(153, 612, 32, 4, 4, 0x02ea, 0x000f, -2, 2, 0x1000, ccount,
-          0, 0, 0, 0, 0, 0)
-  XTREG(154, 616, 32, 4, 4, 0x02eb, 0x0003, -2, 2, 0x1000, prid,
-          0, 0, 0, 0, 0, 0)
-  XTREG(155, 620, 32, 4, 4, 0x02ec, 0x000f, -2, 2, 0x1000, icount,
-          0, 0, 0, 0, 0, 0)
-  XTREG(156, 624,  4, 4, 4, 0x02ed, 0x0007, -2, 2, 0x1000, icountlevel,
-          0, 0, 0, 0, 0, 0)
-  XTREG(157, 628, 32, 4, 4, 0x02ee, 0x0007, -2, 2, 0x1000, excvaddr,
-          0, 0, 0, 0, 0, 0)
-  XTREG(158, 632, 32, 4, 4, 0x02f0, 0x000f, -2, 2, 0x1000, ccompare0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(159, 636, 32, 4, 4, 0x02f1, 0x000f, -2, 2, 0x1000, ccompare1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(160, 640, 32, 4, 4, 0x0000, 0x0006, -2, 8, 0x0100, a0,
-          0, 0, 0, 0, 0, 0)
-  XTREG(161, 644, 32, 4, 4, 0x0001, 0x0006, -2, 8, 0x0100, a1,
-          0, 0, 0, 0, 0, 0)
-  XTREG(162, 648, 32, 4, 4, 0x0002, 0x0006, -2, 8, 0x0100, a2,
-          0, 0, 0, 0, 0, 0)
-  XTREG(163, 652, 32, 4, 4, 0x0003, 0x0006, -2, 8, 0x0100, a3,
-          0, 0, 0, 0, 0, 0)
-  XTREG(164, 656, 32, 4, 4, 0x0004, 0x0006, -2, 8, 0x0100, a4,
-          0, 0, 0, 0, 0, 0)
-  XTREG(165, 660, 32, 4, 4, 0x0005, 0x0006, -2, 8, 0x0100, a5,
-          0, 0, 0, 0, 0, 0)
-  XTREG(166, 664, 32, 4, 4, 0x0006, 0x0006, -2, 8, 0x0100, a6,
-          0, 0, 0, 0, 0, 0)
-  XTREG(167, 668, 32, 4, 4, 0x0007, 0x0006, -2, 8, 0x0100, a7,
-          0, 0, 0, 0, 0, 0)
-  XTREG(168, 672, 32, 4, 4, 0x0008, 0x0006, -2, 8, 0x0100, a8,
-          0, 0, 0, 0, 0, 0)
-  XTREG(169, 676, 32, 4, 4, 0x0009, 0x0006, -2, 8, 0x0100, a9,
-          0, 0, 0, 0, 0, 0)
-  XTREG(170, 680, 32, 4, 4, 0x000a, 0x0006, -2, 8, 0x0100, a10,
-          0, 0, 0, 0, 0, 0)
-  XTREG(171, 684, 32, 4, 4, 0x000b, 0x0006, -2, 8, 0x0100, a11,
-          0, 0, 0, 0, 0, 0)
-  XTREG(172, 688, 32, 4, 4, 0x000c, 0x0006, -2, 8, 0x0100, a12,
-          0, 0, 0, 0, 0, 0)
-  XTREG(173, 692, 32, 4, 4, 0x000d, 0x0006, -2, 8, 0x0100, a13,
-          0, 0, 0, 0, 0, 0)
-  XTREG(174, 696, 32, 4, 4, 0x000e, 0x0006, -2, 8, 0x0100, a14,
-          0, 0, 0, 0, 0, 0)
-  XTREG(175, 700, 32, 4, 4, 0x000f, 0x0006, -2, 8, 0x0100, a15,
-          0, 0, 0, 0, 0, 0)
diff --git a/target-xtensa/helper.c b/target-xtensa/helper.c
index c8ba74e145..f8b2b78fd6 100644
--- a/target-xtensa/helper.c
+++ b/target-xtensa/helper.c
@@ -38,6 +38,8 @@
         a1, a2, a3, a4, a5, a6) \
     { .targno = (no), .type = (typ), .group = (grp) },
 
+static const XtensaConfig core_config[0];
+
 static void reset_mmu(CPUState *env);
 
 void cpu_reset(CPUXtensaState *env)
@@ -53,230 +55,6 @@ void cpu_reset(CPUXtensaState *env)
     reset_mmu(env);
 }
 
-static const XtensaConfig core_config[] = {
-    {
-        .name = "sample-xtensa-core",
-        .options = -1 ^
-            (XTENSA_OPTION_BIT(XTENSA_OPTION_HW_ALIGNMENT) |
-             XTENSA_OPTION_BIT(XTENSA_OPTION_MMU)),
-        .gdb_regmap = {
-            .num_regs = 176,
-            .num_core_regs = 117,
-            .reg = {
-#include "gdb-config-sample-xtensa-core.c"
-            }
-        },
-        .nareg = 64,
-        .ndepc = 1,
-        .excm_level = 16,
-        .vecbase = 0x5fff8400,
-        .exception_vector = {
-            [EXC_RESET] = 0x5fff8000,
-            [EXC_WINDOW_OVERFLOW4] = 0x5fff8400,
-            [EXC_WINDOW_UNDERFLOW4] = 0x5fff8440,
-            [EXC_WINDOW_OVERFLOW8] = 0x5fff8480,
-            [EXC_WINDOW_UNDERFLOW8] = 0x5fff84c0,
-            [EXC_WINDOW_OVERFLOW12] = 0x5fff8500,
-            [EXC_WINDOW_UNDERFLOW12] = 0x5fff8540,
-            [EXC_KERNEL] = 0x5fff861c,
-            [EXC_USER] = 0x5fff863c,
-            [EXC_DOUBLE] = 0x5fff865c,
-        },
-        .ninterrupt = 13,
-        .nlevel = 6,
-        .interrupt_vector = {
-            0,
-            0,
-            0x5fff857c,
-            0x5fff859c,
-            0x5fff85bc,
-            0x5fff85dc,
-            0x5fff85fc,
-        },
-        .level_mask = {
-            [4] = 1,
-        },
-        .interrupt = {
-            [0] = {
-                .level = 4,
-                .inttype = INTTYPE_TIMER,
-            },
-        },
-        .nccompare = 1,
-        .timerint = {
-            [0] = 0,
-        },
-        .clock_freq_khz = 912000,
-    }, {
-        .name = "dc232b",
-        .options = -1 ^
-            (XTENSA_OPTION_BIT(XTENSA_OPTION_HW_ALIGNMENT) |
-             XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_PROTECTION) |
-             XTENSA_OPTION_BIT(XTENSA_OPTION_REGION_TRANSLATION)),
-        .gdb_regmap = {
-            .num_regs = 120,
-            .num_core_regs = 52,
-            .reg = {
-#include "gdb-config-dc232b.c"
-            }
-        },
-        .nareg = 32,
-        .ndepc = 1,
-        .excm_level = 3,
-        .vecbase = 0xd0000000,
-        .exception_vector = {
-            [EXC_RESET] = 0xfe000000,
-            [EXC_WINDOW_OVERFLOW4] = 0xd0000000,
-            [EXC_WINDOW_UNDERFLOW4] = 0xd0000040,
-            [EXC_WINDOW_OVERFLOW8] = 0xd0000080,
-            [EXC_WINDOW_UNDERFLOW8] = 0xd00000c0,
-            [EXC_WINDOW_OVERFLOW12] = 0xd0000100,
-            [EXC_WINDOW_UNDERFLOW12] = 0xd0000140,
-            [EXC_KERNEL] = 0xd0000300,
-            [EXC_USER] = 0xd0000340,
-            [EXC_DOUBLE] = 0xd00003c0,
-        },
-        .ninterrupt = 22,
-        .nlevel = 6,
-        .interrupt_vector = {
-            0,
-            0,
-            0xd0000180,
-            0xd00001c0,
-            0xd0000200,
-            0xd0000240,
-            0xd0000280,
-            0xd00002c0,
-        },
-        .level_mask = {
-            [1] = 0x1f80ff,
-            [2] = 0x000100,
-            [3] = 0x200e00,
-            [4] = 0x001000,
-            [5] = 0x002000,
-            [6] = 0x000000,
-            [7] = 0x004000,
-        },
-        .inttype_mask = {
-            [INTTYPE_EDGE] = 0x3f8000,
-            [INTTYPE_NMI] = 0x4000,
-            [INTTYPE_SOFTWARE] = 0x880,
-        },
-        .interrupt = {
-            [0] = {
-                .level = 1,
-                .inttype = INTTYPE_LEVEL,
-            },
-            [1] = {
-                .level = 1,
-                .inttype = INTTYPE_LEVEL,
-            },
-            [2] = {
-                .level = 1,
-                .inttype = INTTYPE_LEVEL,
-            },
-            [3] = {
-                .level = 1,
-                .inttype = INTTYPE_LEVEL,
-            },
-            [4] = {
-                .level = 1,
-                .inttype = INTTYPE_LEVEL,
-            },
-            [5] = {
-                .level = 1,
-                .inttype = INTTYPE_LEVEL,
-            },
-            [6] = {
-                .level = 1,
-                .inttype = INTTYPE_TIMER,
-            },
-            [7] = {
-                .level = 1,
-                .inttype = INTTYPE_SOFTWARE,
-            },
-            [8] = {
-                .level = 2,
-                .inttype = INTTYPE_LEVEL,
-            },
-            [9] = {
-                .level = 3,
-                .inttype = INTTYPE_LEVEL,
-            },
-            [10] = {
-                .level = 3,
-                .inttype = INTTYPE_TIMER,
-            },
-            [11] = {
-                .level = 3,
-                .inttype = INTTYPE_SOFTWARE,
-            },
-            [12] = {
-                .level = 4,
-                .inttype = INTTYPE_LEVEL,
-            },
-            [13] = {
-                .level = 5,
-                .inttype = INTTYPE_TIMER,
-            },
-            [14] = {
-                .level = 7,
-                .inttype = INTTYPE_NMI,
-            },
-            [15] = {
-                .level = 1,
-                .inttype = INTTYPE_EDGE,
-            },
-            [16] = {
-                .level = 1,
-                .inttype = INTTYPE_EDGE,
-            },
-            [17] = {
-                .level = 1,
-                .inttype = INTTYPE_EDGE,
-            },
-            [18] = {
-                .level = 1,
-                .inttype = INTTYPE_EDGE,
-            },
-            [19] = {
-                .level = 1,
-                .inttype = INTTYPE_EDGE,
-            },
-            [20] = {
-                .level = 1,
-                .inttype = INTTYPE_EDGE,
-            },
-            [21] = {
-                .level = 3,
-                .inttype = INTTYPE_EDGE,
-            },
-        },
-        .nccompare = 3,
-        .timerint = {
-            [0] = 6,
-            [1] = 10,
-            [2] = 13,
-        },
-        .clock_freq_khz = 912000,
-        .itlb = {
-            .nways = 7,
-            .way_size = {
-                4, 4, 4, 4, 4, 2, 2,
-            },
-            .varway56 = false,
-            .nrefillentries = 16,
-        },
-        .dtlb = {
-            .nways = 10,
-            .way_size = {
-                4, 4, 4, 4, 4, 2, 2, 1, 1, 1,
-            },
-            .varway56 = false,
-            .nrefillentries = 16,
-        },
-    },
-};
 
 CPUXtensaState *cpu_xtensa_init(const char *cpu_model)
 {