diff options
author | Richard Henderson <richard.henderson@linaro.org> | 2023-06-02 02:29:40 -0700 |
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committer | Richard Henderson <richard.henderson@linaro.org> | 2023-07-09 13:47:11 +0100 |
commit | 607a5f9d624fdd63d0b7f0e640f7a8d21213b8df (patch) | |
tree | 5964443eddf68bd3c588df6c53a8d57e9e2dc938 | |
parent | 7a70583a4109a177468beab378177b2285344b7a (diff) |
target/riscv: Use aesdec_IMC
This implements the AES64IM instruction.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
-rw-r--r-- | target/riscv/crypto_helper.c | 15 |
1 files changed, 5 insertions, 10 deletions
diff --git a/target/riscv/crypto_helper.c b/target/riscv/crypto_helper.c index e61f7fe1e5..505166ce5a 100644 --- a/target/riscv/crypto_helper.c +++ b/target/riscv/crypto_helper.c @@ -272,17 +272,12 @@ target_ulong HELPER(aes64ks1i)(target_ulong rs1, target_ulong rnum) target_ulong HELPER(aes64im)(target_ulong rs1) { - uint64_t RS1 = rs1; - uint32_t col_0 = RS1 & 0xFFFFFFFF; - uint32_t col_1 = RS1 >> 32; - target_ulong result; - - col_0 = AES_INVMIXCOLUMN(col_0); - col_1 = AES_INVMIXCOLUMN(col_1); - - result = ((uint64_t)col_1 << 32) | col_0; + AESState t; - return result; + t.d[HOST_BIG_ENDIAN] = rs1; + t.d[!HOST_BIG_ENDIAN] = 0; + aesdec_IMC(&t, &t, false); + return t.d[HOST_BIG_ENDIAN]; } target_ulong HELPER(sm4ed)(target_ulong rs1, target_ulong rs2, |