PowerPC 601 / 620 / 970 need a 1MB firmware.

This option is not allowed for PowerMac, as it would overlap with NVRAM.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3480 c046a42c-6fe2-441c-8c8c-71466251a162

4 files changed, 28 insertions, 1 deletions

diff --git a/hw/ppc_chrp.c b/hw/ppc_chrp.c
index f71169e53a..b97f99f8bd 100644
--- a/hw/ppc_chrp.c
+++ b/hw/ppc_chrp.c
@@ -98,6 +98,13 @@ static void ppc_core99_init (int ram_size, int vga_ram_size, int boot_device,
         register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
         envs[i] = env;
     }
+    if (env->nip < 0xFFF80000) {
+        /* Special test for PowerPC 601:
+         * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
+         * But the NVRAM is located at 0xFFF04000...
+         */
+        cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
+    }
 
     /* allocate RAM */
     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
@@ -113,6 +120,10 @@ static void ppc_core99_init (int ram_size, int vga_ram_size, int boot_device,
         exit(1);
     }
     bios_size = (bios_size + 0xfff) & ~0xfff;
+    if (bios_size > 0x00080000) {
+        /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
+        cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
+    }
     cpu_register_physical_memory((uint32_t)(-bios_size),
                                  bios_size, bios_offset | IO_MEM_ROM);
 
diff --git a/hw/ppc_oldworld.c b/hw/ppc_oldworld.c
index 1c25344a77..946ebd176b 100644
--- a/hw/ppc_oldworld.c
+++ b/hw/ppc_oldworld.c
@@ -135,6 +135,13 @@ static void ppc_heathrow_init (int ram_size, int vga_ram_size, int boot_device,
         register_savevm("cpu", 0, 3, cpu_save, cpu_load, env);
         envs[i] = env;
     }
+    if (env->nip < 0xFFF80000) {
+        /* Special test for PowerPC 601:
+         * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
+         * But the NVRAM is located at 0xFFF04000...
+         */
+        cpu_abort(env, "G3BW Mac hardware can not handle 1 MB BIOS\n");
+    }
 
     /* allocate RAM */
     cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
@@ -150,6 +157,10 @@ static void ppc_heathrow_init (int ram_size, int vga_ram_size, int boot_device,
         exit(1);
     }
     bios_size = (bios_size + 0xfff) & ~0xfff;
+    if (bios_size > 0x00080000) {
+        /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
+        cpu_abort(env, "G3BW Mac hardware can not handle 1 MB BIOS\n");
+    }
     cpu_register_physical_memory((uint32_t)(-bios_size),
                                  bios_size, bios_offset | IO_MEM_ROM);
 
diff --git a/hw/ppc_prep.c b/hw/ppc_prep.c
index 966617fe41..fc9fd91077 100644
--- a/hw/ppc_prep.c
+++ b/hw/ppc_prep.c
@@ -574,6 +574,9 @@ static void ppc_prep_init (int ram_size, int vga_ram_size, int boot_device,
         cpu_abort(env, "qemu: could not load PPC PREP bios '%s'\n", buf);
         exit(1);
     }
+    if (env->nip < 0xFFF80000 && bios_size < 0x00100000) {
+        cpu_abort(env, "PowerPC 601 / 620 / 970 need a 1MB BIOS\n");
+    }
     bios_size = (bios_size + 0xfff) & ~0xfff;
     cpu_register_physical_memory((uint32_t)(-bios_size),
                                  bios_size, bios_offset | IO_MEM_ROM);
diff --git a/vl.h b/vl.h
index 5a7f74fc33..964d2eaa33 100644
--- a/vl.h
+++ b/vl.h
@@ -197,7 +197,9 @@ extern unsigned int nb_prom_envs;
 
 /* XXX: make it dynamic */
 #define MAX_BIOS_SIZE (4 * 1024 * 1024)
-#if defined (TARGET_PPC) || defined (TARGET_SPARC64)
+#if defined (TARGET_PPC)
+#define BIOS_SIZE (1024 * 1024)
+#elif defined (TARGET_SPARC64)
 #define BIOS_SIZE ((512 + 32) * 1024)
 #elif defined(TARGET_MIPS)
 #define BIOS_SIZE (4 * 1024 * 1024)