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authorAlex Bennée <alex.bennee@linaro.org>2016-09-30 22:30:59 +0100
committerPaolo Bonzini <pbonzini@redhat.com>2016-10-04 10:00:26 +0200
commit027d9a7d2911e993cdcbd21c7c35d1dd058f05bb (patch)
treeb215197742f489c9af5dd1737ee60be313190f49
parentce7cf6a973f4b614162b9518954d441fa5e32fc6 (diff)
cpu: atomically modify cpu->exit_request
ThreadSanitizer picks up potential races although we already use barriers to ensure things are in the correct order when processing exit requests. For true C11 defined behaviour across threads we need to use relaxed atomic_set/atomic_read semantics to reassure tsan. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20160930213106.20186-9-alex.bennee@linaro.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
-rw-r--r--cpu-exec.c8
-rw-r--r--qom/cpu.c4
2 files changed, 6 insertions, 6 deletions
diff --git a/cpu-exec.c b/cpu-exec.c
index 8823d23df7..e114fcdf29 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -192,7 +192,7 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *cpu, TranslationBlock *itb)
/* We were asked to stop executing TBs (probably a pending
* interrupt. We've now stopped, so clear the flag.
*/
- cpu->tcg_exit_req = 0;
+ atomic_set(&cpu->tcg_exit_req, 0);
}
return ret;
}
@@ -490,8 +490,8 @@ static inline void cpu_handle_interrupt(CPUState *cpu,
*last_tb = NULL;
}
}
- if (unlikely(cpu->exit_request || replay_has_interrupt())) {
- cpu->exit_request = 0;
+ if (unlikely(atomic_read(&cpu->exit_request) || replay_has_interrupt())) {
+ atomic_set(&cpu->exit_request, 0);
cpu->exception_index = EXCP_INTERRUPT;
cpu_loop_exit(cpu);
}
@@ -503,7 +503,7 @@ static inline void cpu_loop_exec_tb(CPUState *cpu, TranslationBlock *tb,
{
uintptr_t ret;
- if (unlikely(cpu->exit_request)) {
+ if (unlikely(atomic_read(&cpu->exit_request))) {
return;
}
diff --git a/qom/cpu.c b/qom/cpu.c
index ef905da9be..e765bc0caf 100644
--- a/qom/cpu.c
+++ b/qom/cpu.c
@@ -120,10 +120,10 @@ void cpu_reset_interrupt(CPUState *cpu, int mask)
void cpu_exit(CPUState *cpu)
{
- cpu->exit_request = 1;
+ atomic_set(&cpu->exit_request, 1);
/* Ensure cpu_exec will see the exit request after TCG has exited. */
smp_wmb();
- cpu->tcg_exit_req = 1;
+ atomic_set(&cpu->tcg_exit_req, 1);
}
int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu,