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authorEdgar E. Iglesias <edgar.iglesias@gmail.com>2010-01-11 15:23:58 +0100
committerEdgar E. Iglesias <edgar.iglesias@gmail.com>2010-01-14 14:42:17 +0100
commitec5c3e487eb49100e6cb1b84e7f0bd022fbbf54b (patch)
treeaef2b50dab6b5fe5d7552d1725be90d7b2cc4b6f
parentc5b9729ae918b890905e00870ffc08c9b56e6d17 (diff)
ppc-40x: Correct decoding of zone protection bits.
The 40x MMU has 15 zones in the ZPR register. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
-rw-r--r--target-ppc/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-ppc/helper.c b/target-ppc/helper.c
index b233d4f535..f9b55890d3 100644
--- a/target-ppc/helper.c
+++ b/target-ppc/helper.c
@@ -1155,7 +1155,7 @@ static int mmu40x_get_physical_address (CPUState *env, mmu_ctx_t *ctx,
env->spr[SPR_40x_PID], 0, i) < 0)
continue;
zsel = (tlb->attr >> 4) & 0xF;
- zpr = (env->spr[SPR_40x_ZPR] >> (28 - (2 * zsel))) & 0x3;
+ zpr = (env->spr[SPR_40x_ZPR] >> (30 - (2 * zsel))) & 0x3;
LOG_SWTLB("%s: TLB %d zsel %d zpr %d rw %d attr %08x\n",
__func__, i, zsel, zpr, rw, tlb->attr);
/* Check execute enable bit */