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authorEduardo Habkost <ehabkost@redhat.com>2015-10-08 17:10:27 -0300
committerEduardo Habkost <ehabkost@redhat.com>2015-10-23 12:59:27 -0200
commit9055330ffbf5ca85f024c29874799d9c8bd17aa9 (patch)
tree822b261193f7a3242e8c6845ced0ef8abde918aa
parent36eb6e096729f9aade3a6af7dbe4d0a990335d7e (diff)
target-i386: Ensure bit 10 on DR7 is never cleared
Bit 10 of DR7 is documented as always set to 1, so ensure that's always the case. Reviewed-by: Richard Henderson <rth@twiddle.net> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
-rw-r--r--target-i386/bpt_helper.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/target-i386/bpt_helper.c b/target-i386/bpt_helper.c
index 23ce828491..49472ea85b 100644
--- a/target-i386/bpt_helper.c
+++ b/target-i386/bpt_helper.c
@@ -85,6 +85,8 @@ void cpu_x86_update_dr7(CPUX86State *env, uint32_t new_dr7)
target_ulong old_dr7 = env->dr[7];
int i;
+ new_dr7 |= DR7_FIXED_1;
+
/* If nothing is changing except the global/local enable bits,
then we can make the change more efficient. */
if (((old_dr7 ^ new_dr7) & ~0xff) == 0) {