diff options
| author | Aurelien Jarno <aurelien@aurel32.net> | 2015-06-03 23:09:43 +0200 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2015-06-05 01:37:58 +0200 |
| commit | 74266b4a5837b46477034a39acc2be3a3afba431 (patch) | |
| tree | 04ec64d25580609da5fa0e7c99f10f60b7802141 | |
| parent | 1dedb9b76f061c8da730002f6c21a1fa2b76b106 (diff) | |
target-s390x: change CHRL and CGHRL format to RIL-b
Change to match the PoP. In practice both format RIL-a and RIL-b have
the same fields. They differ on the way we decode the fields, and it's
done correctly in QEMU.
Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: Alexander Graf <agraf@suse.de>
| -rw-r--r-- | target-s390x/insn-data.def | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 3955443fbf..75672a03f0 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -159,8 +159,8 @@ C(0xe55c, CHSI, SIL, GIE, m1_32s, i2, 0, 0, 0, cmps64) C(0xe558, CGHSI, SIL, GIE, m1_64, i2, 0, 0, 0, cmps64) /* COMPARE HALFWORD RELATIVE LONG */ - C(0xc605, CHRL, RIL_a, GIE, r1_o, mri2_32s, 0, 0, 0, cmps32) - C(0xc604, CGHRL, RIL_a, GIE, r1_o, mri2_64, 0, 0, 0, cmps64) + C(0xc605, CHRL, RIL_b, GIE, r1_o, mri2_32s, 0, 0, 0, cmps32) + C(0xc604, CGHRL, RIL_b, GIE, r1_o, mri2_64, 0, 0, 0, cmps64) /* COMPARE LOGICAL */ C(0x1500, CLR, RR_a, Z, r1, r2, 0, 0, 0, cmpu32) |