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authorAndreas Färber <afaerber@suse.de>2013-02-17 23:16:08 +0000
committerAlexander Graf <agraf@suse.de>2013-03-08 21:04:46 +0100
commit8f43bc789c7ddd1a0f5b3cbc55cf67a1c6ae44e5 (patch)
tree4ca54893349b06325a845ce4f6ef83ac0b0be953
parent20267b6f327ed2d7c54451034d234d67b1b410e9 (diff)
target-ppc: Extract 40x aliases
Signed-off-by: Andreas Färber <afaerber@suse.de> Signed-off-by: Alexander Graf <agraf@suse.de>
-rw-r--r--target-ppc/translate_init.c25
1 files changed, 7 insertions, 18 deletions
diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c
index 6a86e10408..8a3cf9f91c 100644
--- a/target-ppc/translate_init.c
+++ b/target-ppc/translate_init.c
@@ -6852,8 +6852,6 @@ enum {
CPU_POWERPC_XIPCHIP = xxx,
#endif
/* PowerPC 403 family */
- /* Generic PowerPC 403 */
-#define CPU_POWERPC_403 CPU_POWERPC_403GC
/* PowerPC 403 microcontrollers */
CPU_POWERPC_403GA = 0x00200011,
CPU_POWERPC_403GB = 0x00200100,
@@ -6863,8 +6861,6 @@ enum {
CPU_POWERPC_403GP = xxx,
#endif
/* PowerPC 405 family */
- /* Generic PowerPC 405 */
-#define CPU_POWERPC_405 CPU_POWERPC_405D4
/* PowerPC 405 cores */
#if 0
CPU_POWERPC_405A3 = xxx,
@@ -6906,7 +6902,6 @@ enum {
#endif
/* PowerPC 405 microcontrolers */
/* XXX: missing 0x200108a0 */
-#define CPU_POWERPC_405CR CPU_POWERPC_405CRc
CPU_POWERPC_405CRa = 0x40110041,
CPU_POWERPC_405CRb = 0x401100C5,
CPU_POWERPC_405CRc = 0x40110145,
@@ -6918,7 +6913,6 @@ enum {
#if 0
CPU_POWERPC_405FX = xxx,
#endif
-#define CPU_POWERPC_405GP CPU_POWERPC_405GPd
CPU_POWERPC_405GPa = 0x40110000,
CPU_POWERPC_405GPb = 0x40110040,
CPU_POWERPC_405GPc = 0x40110082,
@@ -6979,9 +6973,7 @@ enum {
#endif
/* Xilinx cores */
CPU_POWERPC_X2VP4 = 0x20010820,
-#define CPU_POWERPC_X2VP7 CPU_POWERPC_X2VP4
CPU_POWERPC_X2VP20 = 0x20010860,
-#define CPU_POWERPC_X2VP50 CPU_POWERPC_X2VP20
#if 0
CPU_POWERPC_ZL10310 = xxx,
#endif
@@ -7701,8 +7693,6 @@ static const ppc_def_t ppc_defs[] = {
POWERPC_DEF("Xipchip", CPU_POWERPC_XIPCHIP, 401)
#endif
/* PowerPC 403 family */
- /* Generic PowerPC 403 */
- POWERPC_DEF("403", CPU_POWERPC_403, 403)
/* PowerPC 403 microcontrolers */
/* PowerPC 403 GA */
POWERPC_DEF("403GA", CPU_POWERPC_403GA, 403)
@@ -7717,8 +7707,6 @@ static const ppc_def_t ppc_defs[] = {
POWERPC_DEF("403GP", CPU_POWERPC_403GP, 403)
#endif
/* PowerPC 405 family */
- /* Generic PowerPC 405 */
- POWERPC_DEF("405", CPU_POWERPC_405, 405)
/* PowerPC 405 cores */
#if defined (TODO)
/* PowerPC 405 A3 */
@@ -7773,8 +7761,6 @@ static const ppc_def_t ppc_defs[] = {
POWERPC_DEF("405F6", CPU_POWERPC_405F6, 405)
#endif
/* PowerPC 405 microcontrolers */
- /* PowerPC 405 CR */
- POWERPC_DEF("405CR", CPU_POWERPC_405CR, 405)
/* PowerPC 405 CRa */
POWERPC_DEF("405CRa", CPU_POWERPC_405CRa, 405)
/* PowerPC 405 CRb */
@@ -7793,8 +7779,6 @@ static const ppc_def_t ppc_defs[] = {
/* PowerPC 405 FX */
POWERPC_DEF("405FX", CPU_POWERPC_405FX, 405)
#endif
- /* PowerPC 405 GP */
- POWERPC_DEF("405GP", CPU_POWERPC_405GP, 405)
/* PowerPC 405 GPa */
POWERPC_DEF("405GPa", CPU_POWERPC_405GPa, 405)
/* PowerPC 405 GPb */
@@ -7880,9 +7864,7 @@ static const ppc_def_t ppc_defs[] = {
#endif
/* Xilinx PowerPC 405 cores */
POWERPC_DEF("x2vp4", CPU_POWERPC_X2VP4, 405)
- POWERPC_DEF("x2vp7", CPU_POWERPC_X2VP7, 405)
POWERPC_DEF("x2vp20", CPU_POWERPC_X2VP20, 405)
- POWERPC_DEF("x2vp50", CPU_POWERPC_X2VP50, 405)
#if defined (TODO)
/* Zarlink ZL10310 */
POWERPC_DEF("zl10310", CPU_POWERPC_ZL10310, 405)
@@ -9160,6 +9142,13 @@ typedef struct PowerPCCPUAlias {
} PowerPCCPUAlias;
static const PowerPCCPUAlias ppc_cpu_aliases[] = {
+ { "403", "403GC" },
+ { "405", "405D4" },
+ { "405CR", "405CRc" },
+ { "405GP", "405GPd" },
+ { "x2vp7", "x2vp4" },
+ { "x2vp50", "x2vp20" },
+
{ "RCPU", "MPC5xx" },
/* MPC5xx microcontrollers */
{ "MGT560", "MPC5xx" },