diff options
author | Richard Henderson <rth@twiddle.net> | 2012-08-23 21:08:22 -0700 |
---|---|---|
committer | Richard Henderson <rth@twiddle.net> | 2013-01-05 12:18:41 -0800 |
commit | 683bb9a8889cd00e69b05ba78bd5ba27f2e4e958 (patch) | |
tree | 167c0011f439d2acdb423e21ef1c8b83623f95ff | |
parent | 68c8bd93ccb0ee441d62b5b8b8911cf5c38663f8 (diff) |
target-s390: Convert CONVERT FROM FIXED
Signed-off-by: Richard Henderson <rth@twiddle.net>
-rw-r--r-- | target-s390x/fpu_helper.c | 81 | ||||
-rw-r--r-- | target-s390x/helper.h | 9 | ||||
-rw-r--r-- | target-s390x/insn-data.def | 7 | ||||
-rw-r--r-- | target-s390x/translate.c | 73 |
4 files changed, 66 insertions, 104 deletions
diff --git a/target-s390x/fpu_helper.c b/target-s390x/fpu_helper.c index ff3b435e89..ac530e9700 100644 --- a/target-s390x/fpu_helper.c +++ b/target-s390x/fpu_helper.c @@ -134,57 +134,6 @@ uint32_t set_cc_nz_f128(float128 v) } } -/* convert 32-bit int to 64-bit float */ -void HELPER(cdfbr)(CPUS390XState *env, uint32_t f1, int32_t v2) -{ - HELPER_LOG("%s: converting %d to f%d\n", __func__, v2, f1); - env->fregs[f1].d = int32_to_float64(v2, &env->fpu_status); -} - -/* convert 32-bit int to 128-bit float */ -void HELPER(cxfbr)(CPUS390XState *env, uint32_t f1, int32_t v2) -{ - CPU_QuadU v1; - - v1.q = int32_to_float128(v2, &env->fpu_status); - env->fregs[f1].ll = v1.ll.upper; - env->fregs[f1 + 2].ll = v1.ll.lower; -} - -/* convert 64-bit int to 32-bit float */ -void HELPER(cegbr)(CPUS390XState *env, uint32_t f1, int64_t v2) -{ - HELPER_LOG("%s: converting %ld to f%d\n", __func__, v2, f1); - env->fregs[f1].l.upper = int64_to_float32(v2, &env->fpu_status); -} - -/* convert 64-bit int to 64-bit float */ -void HELPER(cdgbr)(CPUS390XState *env, uint32_t f1, int64_t v2) -{ - HELPER_LOG("%s: converting %ld to f%d\n", __func__, v2, f1); - env->fregs[f1].d = int64_to_float64(v2, &env->fpu_status); -} - -/* convert 64-bit int to 128-bit float */ -void HELPER(cxgbr)(CPUS390XState *env, uint32_t f1, int64_t v2) -{ - CPU_QuadU x1; - - x1.q = int64_to_float128(v2, &env->fpu_status); - HELPER_LOG("%s: converted %ld to 0x%lx and 0x%lx\n", __func__, v2, - x1.ll.upper, x1.ll.lower); - env->fregs[f1].ll = x1.ll.upper; - env->fregs[f1 + 2].ll = x1.ll.lower; -} - -/* convert 32-bit int to 32-bit float */ -void HELPER(cefbr)(CPUS390XState *env, uint32_t f1, int32_t v2) -{ - env->fregs[f1].l.upper = int32_to_float32(v2, &env->fpu_status); - HELPER_LOG("%s: converting %d to 0x%d in f%d\n", __func__, v2, - env->fregs[f1].l.upper, f1); -} - /* 32-bit FP addition */ uint64_t HELPER(aeb)(CPUS390XState *env, uint64_t f1, uint64_t f2) { @@ -416,6 +365,36 @@ static int swap_round_mode(CPUS390XState *env, int m3) return ret; } +/* convert 64-bit int to 32-bit float */ +uint64_t HELPER(cegb)(CPUS390XState *env, int64_t v2, uint32_t m3) +{ + int hold = swap_round_mode(env, m3); + float32 ret = int64_to_float32(v2, &env->fpu_status); + set_float_rounding_mode(hold, &env->fpu_status); + handle_exceptions(env, GETPC()); + return ret; +} + +/* convert 64-bit int to 64-bit float */ +uint64_t HELPER(cdgb)(CPUS390XState *env, int64_t v2, uint32_t m3) +{ + int hold = swap_round_mode(env, m3); + float64 ret = int64_to_float64(v2, &env->fpu_status); + set_float_rounding_mode(hold, &env->fpu_status); + handle_exceptions(env, GETPC()); + return ret; +} + +/* convert 64-bit int to 128-bit float */ +uint64_t HELPER(cxgb)(CPUS390XState *env, int64_t v2, uint32_t m3) +{ + int hold = swap_round_mode(env, m3); + float128 ret = int64_to_float128(v2, &env->fpu_status); + set_float_rounding_mode(hold, &env->fpu_status); + handle_exceptions(env, GETPC()); + return RET128(ret); +} + /* convert 32-bit float to 64-bit int */ uint64_t HELPER(cgeb)(CPUS390XState *env, uint64_t v2, uint32_t m3) { diff --git a/target-s390x/helper.h b/target-s390x/helper.h index 1439b5ed1f..d9f630ecc3 100644 --- a/target-s390x/helper.h +++ b/target-s390x/helper.h @@ -30,12 +30,9 @@ DEF_HELPER_4(stam, void, env, i32, i64, i32) DEF_HELPER_4(lam, void, env, i32, i64, i32) DEF_HELPER_4(mvcle, i32, env, i32, i64, i32) DEF_HELPER_4(clcle, i32, env, i32, i64, i32) -DEF_HELPER_3(cefbr, void, env, i32, s32) -DEF_HELPER_3(cdfbr, void, env, i32, s32) -DEF_HELPER_3(cxfbr, void, env, i32, s32) -DEF_HELPER_3(cegbr, void, env, i32, s64) -DEF_HELPER_3(cdgbr, void, env, i32, s64) -DEF_HELPER_3(cxgbr, void, env, i32, s64) +DEF_HELPER_3(cegb, i64, env, s64, i32) +DEF_HELPER_3(cdgb, i64, env, s64, i32) +DEF_HELPER_3(cxgb, i64, env, s64, i32) DEF_HELPER_3(aeb, i64, env, i64, i64) DEF_HELPER_3(adb, i64, env, i64, i64) DEF_HELPER_5(axb, i64, env, i64, i64, i64, i64) diff --git a/target-s390x/insn-data.def b/target-s390x/insn-data.def index 2d88b70474..d5e1c5c1cd 100644 --- a/target-s390x/insn-data.def +++ b/target-s390x/insn-data.def @@ -170,6 +170,13 @@ C(0xb3a8, CGEBR, RRF_e, Z, 0, e2, r1, 0, cgeb, 0) C(0xb3a9, CGDBR, RRF_e, Z, 0, f2_o, r1, 0, cgdb, 0) C(0xb3aa, CGXBR, RRF_e, Z, 0, x2_o, r1, 0, cgxb, 0) +/* CONVERT FROM FIXED */ + C(0xb394, CEFBR, RRF_e, Z, 0, r2_32s, new, e1, cegb, 0) + C(0xb395, CDFBR, RRF_e, Z, 0, r2_32s, f1, 0, cdgb, 0) + C(0xb396, CXFBR, RRF_e, Z, 0, r2_32s, x1, 0, cxgb, 0) + C(0xb3a4, CEGBR, RRF_e, Z, 0, r2_o, new, e1, cegb, 0) + C(0xb3a5, CDGBR, RRF_e, Z, 0, r2_o, f1, 0, cdgb, 0) + C(0xb3a6, CXGBR, RRF_e, Z, 0, r2_o, x1, 0, cxgb, 0) /* DIVIDE */ C(0x1d00, DR, RR_a, Z, r1_D32, r2_32s, new_P, r1_P32, divs32, 0) diff --git a/target-s390x/translate.c b/target-s390x/translate.c index 03fae68b10..47ccc6740a 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -1381,8 +1381,7 @@ static void disas_b2(CPUS390XState *env, DisasContext *s, int op, static void disas_b3(CPUS390XState *env, DisasContext *s, int op, int m3, int r1, int r2) { - TCGv_i64 tmp; - TCGv_i32 tmp32_1, tmp32_2; + TCGv_i32 tmp32_1; LOG_DISAS("disas_b3: op 0x%x m3 0x%x r1 %d r2 %d\n", op, m3, r1, r2); #define FP_HELPER(i) \ tmp32_1 = tcg_const_i32(r1); \ @@ -1405,51 +1404,6 @@ static void disas_b3(CPUS390XState *env, DisasContext *s, int op, int m3, tcg_gen_st_i32(tmp32_1, cpu_env, offsetof(CPUS390XState, fpc)); tcg_temp_free_i32(tmp32_1); break; - case 0x94: /* CEFBR R1,R2 [RRE] */ - case 0x95: /* CDFBR R1,R2 [RRE] */ - case 0x96: /* CXFBR R1,R2 [RRE] */ - tmp32_1 = tcg_const_i32(r1); - tmp32_2 = load_reg32(r2); - switch (op) { - case 0x94: - gen_helper_cefbr(cpu_env, tmp32_1, tmp32_2); - break; - case 0x95: - gen_helper_cdfbr(cpu_env, tmp32_1, tmp32_2); - break; - case 0x96: - gen_helper_cxfbr(cpu_env, tmp32_1, tmp32_2); - break; - default: - tcg_abort(); - } - tcg_temp_free_i32(tmp32_1); - tcg_temp_free_i32(tmp32_2); - break; - case 0xa4: /* CEGBR R1,R2 [RRE] */ - case 0xa5: /* CDGBR R1,R2 [RRE] */ - tmp32_1 = tcg_const_i32(r1); - tmp = load_reg(r2); - switch (op) { - case 0xa4: - gen_helper_cegbr(cpu_env, tmp32_1, tmp); - break; - case 0xa5: - gen_helper_cdgbr(cpu_env, tmp32_1, tmp); - break; - default: - tcg_abort(); - } - tcg_temp_free_i32(tmp32_1); - tcg_temp_free_i64(tmp); - break; - case 0xa6: /* CXGBR R1,R2 [RRE] */ - tmp32_1 = tcg_const_i32(r1); - tmp = load_reg(r2); - gen_helper_cxgbr(cpu_env, tmp32_1, tmp); - tcg_temp_free_i32(tmp32_1); - tcg_temp_free_i64(tmp); - break; default: LOG_DISAS("illegal b3 operation 0x%x\n", op); gen_illegal_opcode(s); @@ -2144,6 +2098,31 @@ static ExitStatus op_cgxb(DisasContext *s, DisasOps *o) return NO_EXIT; } +static ExitStatus op_cegb(DisasContext *s, DisasOps *o) +{ + TCGv_i32 m3 = tcg_const_i32(get_field(s->fields, m3)); + gen_helper_cegb(o->out, cpu_env, o->in2, m3); + tcg_temp_free_i32(m3); + return NO_EXIT; +} + +static ExitStatus op_cdgb(DisasContext *s, DisasOps *o) +{ + TCGv_i32 m3 = tcg_const_i32(get_field(s->fields, m3)); + gen_helper_cdgb(o->out, cpu_env, o->in2, m3); + tcg_temp_free_i32(m3); + return NO_EXIT; +} + +static ExitStatus op_cxgb(DisasContext *s, DisasOps *o) +{ + TCGv_i32 m3 = tcg_const_i32(get_field(s->fields, m3)); + gen_helper_cxgb(o->out, cpu_env, o->in2, m3); + tcg_temp_free_i32(m3); + return_low128(o->out2); + return NO_EXIT; +} + static ExitStatus op_clc(DisasContext *s, DisasOps *o) { int l = get_field(s->fields, l1); |