diff options
| author | Alexey Kardashevskiy <aik@ozlabs.ru> | 2014-06-04 22:50:44 +1000 |
|---|---|---|
| committer | Alexander Graf <agraf@suse.de> | 2014-06-16 13:24:43 +0200 |
| commit | ba881002194f61598aa8bd33c98a471210e904ef (patch) | |
| tree | 0cba82a7b85989ea9f3ce7d91ce6a1c095e9c902 | |
| parent | c36c97f8804bbc2cd731f37a159ecdf618600871 (diff) | |
target-ppc: Add HID4 SPR for PPC970
Previously LPCR was registered for the 970 class which was wrong as
it does not have LPCR. Instead, HID4 is used which this patch registers.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: Tom Musta <tommusta@gmail.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
| -rw-r--r-- | target-ppc/cpu.h | 1 | ||||
| -rw-r--r-- | target-ppc/translate_init.c | 11 |
2 files changed, 12 insertions, 0 deletions
diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h index 92e26c854a..6a53d70af5 100644 --- a/target-ppc/cpu.h +++ b/target-ppc/cpu.h @@ -1679,6 +1679,7 @@ static inline int cpu_mmu_index (CPUPPCState *env) #define SPR_750_TDCL (0x3F4) #define SPR_40x_IAC1 (0x3F4) #define SPR_MMUCSR0 (0x3F4) +#define SPR_970_HID4 (0x3F4) #define SPR_DABR (0x3F5) #define DABR_MASK (~(target_ulong)0x7) #define SPR_Exxx_BUCSR (0x3F5) diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c index 568bf9cf8f..310310e92e 100644 --- a/target-ppc/translate_init.c +++ b/target-ppc/translate_init.c @@ -7308,6 +7308,16 @@ static void gen_spr_970_hior(CPUPPCState *env) 0x00000000); } +static void gen_spr_970_lpar(CPUPPCState *env) +{ + /* Logical partitionning */ + /* PPC970: HID4 is effectively the LPCR */ + spr_register(env, SPR_970_HID4, "HID4", + SPR_NOACCESS, SPR_NOACCESS, + &spr_read_generic, &spr_write_generic, + 0x00000000); +} + static void gen_spr_book3s_common(CPUPPCState *env) { spr_register(env, SPR_CTRL, "SPR_CTRL", @@ -7497,6 +7507,7 @@ static void init_proc_970 (CPUPPCState *env) gen_spr_book3s_common(env); gen_spr_970_pmu_sup(env); gen_spr_970_pmu_user(env); + gen_spr_970_lpar(env); gen_spr_power5p_ear(env); |