diff options
| author | Max Filippov <jcmvbkbc@gmail.com> | 2011-09-06 03:55:50 +0400 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2011-09-10 16:57:39 +0000 |
| commit | f3df4c04d83b7f2f319ca8025c895b74aa7eab8d (patch) | |
| tree | ae035b60c86981ad0fe9b5513c083c23dd0eab55 | |
| parent | 772177c194e5ea113945a9b5c15a6ab47bb84006 (diff) | |
target-xtensa: implement CPENABLE and PRID SRs
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| -rw-r--r-- | hw/xtensa_sample.c | 1 | ||||
| -rw-r--r-- | target-xtensa/cpu.h | 2 | ||||
| -rw-r--r-- | target-xtensa/translate.c | 7 |
3 files changed, 10 insertions, 0 deletions
diff --git a/hw/xtensa_sample.c b/hw/xtensa_sample.c index 0aeb7c8ca8..31a6f70825 100644 --- a/hw/xtensa_sample.c +++ b/hw/xtensa_sample.c @@ -55,6 +55,7 @@ static void xtensa_init(ram_addr_t ram_size, exit(1); } qemu_register_reset(xtensa_sample_reset, env); + env->sregs[PRID] = n; } ram = g_malloc(sizeof(*ram)); diff --git a/target-xtensa/cpu.h b/target-xtensa/cpu.h index 474466cc35..37f8b7f6d5 100644 --- a/target-xtensa/cpu.h +++ b/target-xtensa/cpu.h @@ -118,12 +118,14 @@ enum { DEPC = 192, EPS2 = 194, EXCSAVE1 = 209, + CPENABLE = 224, INTSET = 226, INTCLEAR = 227, INTENABLE = 228, PS = 230, EXCCAUSE = 232, CCOUNT = 234, + PRID = 235, EXCVADDR = 238, CCOMPARE = 240, }; diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index cee1f1c48e..d08b0ca66b 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -101,12 +101,14 @@ static const char * const sregnames[256] = { [EXCSAVE1 + 4] = "EXCSAVE5", [EXCSAVE1 + 5] = "EXCSAVE6", [EXCSAVE1 + 6] = "EXCSAVE7", + [CPENABLE] = "CPENABLE", [INTSET] = "INTSET", [INTCLEAR] = "INTCLEAR", [INTENABLE] = "INTENABLE", [PS] = "PS", [EXCCAUSE] = "EXCCAUSE", [CCOUNT] = "CCOUNT", + [PRID] = "PRID", [EXCVADDR] = "EXCVADDR", [CCOMPARE] = "CCOMPARE0", [CCOMPARE + 1] = "CCOMPARE1", @@ -476,6 +478,10 @@ static void gen_wsr_ps(DisasContext *dc, uint32_t sr, TCGv_i32 v) gen_jumpi_check_loop_end(dc, -1); } +static void gen_wsr_prid(DisasContext *dc, uint32_t sr, TCGv_i32 v) +{ +} + static void gen_wsr_ccompare(DisasContext *dc, uint32_t sr, TCGv_i32 v) { uint32_t id = sr - CCOMPARE; @@ -502,6 +508,7 @@ static void gen_wsr(DisasContext *dc, uint32_t sr, TCGv_i32 s) [INTCLEAR] = gen_wsr_intclear, [INTENABLE] = gen_wsr_intenable, [PS] = gen_wsr_ps, + [PRID] = gen_wsr_prid, [CCOMPARE] = gen_wsr_ccompare, [CCOMPARE + 1] = gen_wsr_ccompare, [CCOMPARE + 2] = gen_wsr_ccompare, |