diff options
| author | Andreas Färber <afaerber@suse.de> | 2013-02-02 12:33:14 +0100 |
|---|---|---|
| committer | Andreas Färber <afaerber@suse.de> | 2013-03-12 10:35:55 +0100 |
| commit | e6f010cc27177c97596455b2e2b589bd19b2a486 (patch) | |
| tree | 43403ce74bd92387e1842af44a21ea3fe31fc172 | |
| parent | 97a8ea5a3ae7938cb54fd4dc19d3a413024bc6c0 (diff) | |
target-arm: Override do_interrupt for ARMv7-M profile
Enable ARMCPUInfo to specify a custom class_init functions.
Introduce arm_v7m_class_init() and use it for "cortex-m3" model.
Instead of forwarding from arm_cpu_do_interrupt() to do_interrupt_v7m(),
override CPUClass::do_interrupt with arm_v7m_cpu_do_interrupt()
in arm_v7m_class_init().
Acked-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Andreas Färber <afaerber@suse.de>
| -rw-r--r-- | target-arm/cpu-qom.h | 1 | ||||
| -rw-r--r-- | target-arm/cpu.c | 14 | ||||
| -rw-r--r-- | target-arm/helper.c | 10 |
3 files changed, 19 insertions, 6 deletions
diff --git a/target-arm/cpu-qom.h b/target-arm/cpu-qom.h index eeecc9265d..25895509be 100644 --- a/target-arm/cpu-qom.h +++ b/target-arm/cpu-qom.h @@ -114,5 +114,6 @@ static inline ARMCPU *arm_env_get_cpu(CPUARMState *env) void register_cp_regs_for_features(ARMCPU *cpu); void arm_cpu_do_interrupt(CPUState *cpu); +void arm_v7m_cpu_do_interrupt(CPUState *cpu); #endif diff --git a/target-arm/cpu.c b/target-arm/cpu.c index aeaa3b7834..a1e90939d6 100644 --- a/target-arm/cpu.c +++ b/target-arm/cpu.c @@ -412,6 +412,15 @@ static void cortex_m3_initfn(Object *obj) cpu->midr = 0x410fc231; } +static void arm_v7m_class_init(ObjectClass *oc, void *data) +{ +#ifndef CONFIG_USER_ONLY + CPUClass *cc = CPU_CLASS(oc); + + cc->do_interrupt = arm_v7m_cpu_do_interrupt; +#endif +} + static const ARMCPRegInfo cortexa8_cp_reginfo[] = { { .name = "L2LOCKDOWN", .cp = 15, .crn = 9, .crm = 0, .opc1 = 1, .opc2 = 0, .access = PL1_RW, .type = ARM_CP_CONST, .resetvalue = 0 }, @@ -752,6 +761,7 @@ static void arm_any_initfn(Object *obj) typedef struct ARMCPUInfo { const char *name; void (*initfn)(Object *obj); + void (*class_init)(ObjectClass *oc, void *data); } ARMCPUInfo; static const ARMCPUInfo arm_cpus[] = { @@ -766,7 +776,8 @@ static const ARMCPUInfo arm_cpus[] = { { .name = "arm1136", .initfn = arm1136_initfn }, { .name = "arm1176", .initfn = arm1176_initfn }, { .name = "arm11mpcore", .initfn = arm11mpcore_initfn }, - { .name = "cortex-m3", .initfn = cortex_m3_initfn }, + { .name = "cortex-m3", .initfn = cortex_m3_initfn, + .class_init = arm_v7m_class_init }, { .name = "cortex-a8", .initfn = cortex_a8_initfn }, { .name = "cortex-a9", .initfn = cortex_a9_initfn }, { .name = "cortex-a15", .initfn = cortex_a15_initfn }, @@ -812,6 +823,7 @@ static void cpu_register(const ARMCPUInfo *info) .instance_size = sizeof(ARMCPU), .instance_init = info->initfn, .class_size = sizeof(ARMCPUClass), + .class_init = info->class_init, }; type_info.name = g_strdup_printf("%s-" TYPE_ARM_CPU, info->name); diff --git a/target-arm/helper.c b/target-arm/helper.c index b4cbb8718a..fd055e89f2 100644 --- a/target-arm/helper.c +++ b/target-arm/helper.c @@ -1725,8 +1725,10 @@ static void do_v7m_exception_exit(CPUARMState *env) pointer. */ } -static void do_interrupt_v7m(CPUARMState *env) +void arm_v7m_cpu_do_interrupt(CPUState *cs) { + ARMCPU *cpu = ARM_CPU(cs); + CPUARMState *env = &cpu->env; uint32_t xpsr = xpsr_read(env); uint32_t lr; uint32_t addr; @@ -1811,10 +1813,8 @@ void arm_cpu_do_interrupt(CPUState *cs) int new_mode; uint32_t offset; - if (IS_M(env)) { - do_interrupt_v7m(env); - return; - } + assert(!IS_M(env)); + /* TODO: Vectored interrupt controller. */ switch (env->exception_index) { case EXCP_UDEF: |