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authorths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-02 08:18:36 +0000
committerths <ths@c046a42c-6fe2-441c-8c8c-71466251a162>2007-04-02 08:18:36 +0000
commit687fa640d49ce19b9b9a2258fde19e1500bfabb4 (patch)
treef835f5923fdf8a4592176d9630978c411e082834
parentd34cab9f49bc3ad83a2a968fc2d2719179db2c15 (diff)
Random bug fixes from code inspection, by Wang Cheng Yeh.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2580 c046a42c-6fe2-441c-8c8c-71466251a162
-rw-r--r--hw/lsi53c895a.c1
-rw-r--r--hw/smc91c111.c6
-rw-r--r--target-arm/translate.c4
3 files changed, 6 insertions, 5 deletions
diff --git a/hw/lsi53c895a.c b/hw/lsi53c895a.c
index 07e09f3cc8..193ff12204 100644
--- a/hw/lsi53c895a.c
+++ b/hw/lsi53c895a.c
@@ -1046,6 +1046,7 @@ again:
case 5: /* SHR */
op1 = op0 & 1;
op0 = (op0 >> 1) | (s->carry << 7);
+ s->carry = op1;
break;
case 6: /* ADD */
op0 += op1;
diff --git a/hw/smc91c111.c b/hw/smc91c111.c
index 0249cfe98b..855a9b1f1d 100644
--- a/hw/smc91c111.c
+++ b/hw/smc91c111.c
@@ -446,7 +446,9 @@ static uint32_t smc91c111_readb(void *opaque, target_phys_addr_t offset)
case 7:
/* Not implemented. */
return 0;
- case 8: /* Free memory available. */
+ case 8: /* Memory size. */
+ return NUM_PACKETS;
+ case 9: /* Free memory available. */
{
int i;
int n;
@@ -457,8 +459,6 @@ static uint32_t smc91c111_readb(void *opaque, target_phys_addr_t offset)
}
return n;
}
- case 9: /* Memory size. */
- return NUM_PACKETS;
case 10: case 11: /* RPCR */
/* Not implemented. */
return 0;
diff --git a/target-arm/translate.c b/target-arm/translate.c
index 4cb9142f4f..1631fcd312 100644
--- a/target-arm/translate.c
+++ b/target-arm/translate.c
@@ -2583,8 +2583,8 @@ void cpu_dump_state(CPUState *env, FILE *f,
cpu_fprintf(f, " ");
}
psr = cpsr_read(env);
- cpu_fprintf(f, "PSR=%08x %c%c%c%c %c %s%d %x\n",
- psr,
+ cpu_fprintf(f, "PSR=%08x %c%c%c%c %c %s%d\n",
+ psr,
psr & (1 << 31) ? 'N' : '-',
psr & (1 << 30) ? 'Z' : '-',
psr & (1 << 29) ? 'C' : '-',