diff options
| author | Richard Henderson <rth@twiddle.net> | 2011-05-04 13:34:25 -0700 |
|---|---|---|
| committer | Blue Swirl <blauwirbel@gmail.com> | 2011-05-08 16:55:23 +0000 |
| commit | 3125f76335f54e17e2b41621184c9cda1c2b238e (patch) | |
| tree | 93d5337b418df707c859de4b1ef5f4df7ed047bc | |
| parent | 9c76219eaa68e9138521a8e28ee3fff056c83fb1 (diff) | |
irq: Introduce and use CPU_INTERRUPT_SSTEP_MASK.
This mask contains all of the bits that should be ignored while single
stepping in the debugger. The mask contains 2 bits that are not currently
cleared, but are also never set. The bits are included in the mask for
consistency in handling of the CPU_INTERRUPT_TGT_EXT_N bits.
Signed-off-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
| -rw-r--r-- | cpu-all.h | 8 | ||||
| -rw-r--r-- | cpu-exec.c | 5 |
2 files changed, 9 insertions, 4 deletions
@@ -837,6 +837,14 @@ extern CPUState *cpu_single_env; #define CPU_INTERRUPT_SIPI CPU_INTERRUPT_TGT_INT_2 #define CPU_INTERRUPT_MCE CPU_INTERRUPT_TGT_EXT_4 +/* The set of all bits that should be masked when single-stepping. */ +#define CPU_INTERRUPT_SSTEP_MASK \ + (CPU_INTERRUPT_HARD \ + | CPU_INTERRUPT_TGT_EXT_0 \ + | CPU_INTERRUPT_TGT_EXT_1 \ + | CPU_INTERRUPT_TGT_EXT_2 \ + | CPU_INTERRUPT_TGT_EXT_3 \ + | CPU_INTERRUPT_TGT_EXT_4) #ifndef CONFIG_USER_ONLY typedef void (*CPUInterruptHandler)(CPUState *, int); diff --git a/cpu-exec.c b/cpu-exec.c index 395cd8cf90..5b42b2581a 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -360,10 +360,7 @@ int cpu_exec(CPUState *env1) if (unlikely(interrupt_request)) { if (unlikely(env->singlestep_enabled & SSTEP_NOIRQ)) { /* Mask out external interrupts for this step. */ - interrupt_request &= ~(CPU_INTERRUPT_HARD | - CPU_INTERRUPT_FIQ | - CPU_INTERRUPT_SMI | - CPU_INTERRUPT_NMI); + interrupt_request &= ~CPU_INTERRUPT_SSTEP_MASK; } if (interrupt_request & CPU_INTERRUPT_DEBUG) { env->interrupt_request &= ~CPU_INTERRUPT_DEBUG; |