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authorEdgar E. Iglesias <edgar.iglesias@xilinx.com>2014-05-01 15:24:45 +0100
committerPeter Maydell <peter.maydell@linaro.org>2014-05-01 15:24:45 +0100
commitfed3ffb9f157f33bc9b2b1c3ef68e710ee6b7b4b (patch)
treeaf8772fca3cd07adf8fe320b6e838b388d3b4984
parent252ec4057685cd9bf6a13f96528c843754af8fad (diff)
target-arm: Make vbar_write 64bit friendly on 32bit hosts
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Message-id: 1398926097-28097-2-git-send-email-edgar.iglesias@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
-rw-r--r--target-arm/helper.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target-arm/helper.c b/target-arm/helper.c
index 7c083c33a0..7823e8c3dd 100644
--- a/target-arm/helper.c
+++ b/target-arm/helper.c
@@ -657,7 +657,7 @@ static void vbar_write(CPUARMState *env, const ARMCPRegInfo *ri,
* contexts. (ARMv8 would permit us to do no masking at all, but ARMv7
* requires the bottom five bits to be RAZ/WI because they're UNK/SBZP.)
*/
- env->cp15.c12_vbar = value & ~0x1Ful;
+ env->cp15.c12_vbar = value & ~0x1FULL;
}
static uint64_t ccsidr_read(CPUARMState *env, const ARMCPRegInfo *ri)